RE: [tpmdd-devel] [PATCH] tpm_tis_spi: Use DMA-safe memory for SPI transfers

[<Alexander.Steffen@infineon.com>]

> >  struct tpm_tis_spi_phy {
> >  	struct tpm_tis_data priv;
> >  	struct spi_device *spi_device;
> > -
> > -	u8 tx_buf[4];
> > -	u8 rx_buf[4];
> > +	u8 *iobuf;
> 
> tpm_tis_spi_phy is already devm_kzalloc'd, why embed another kalloc
> pointer inside it?

I was mostly going by the documentation in https://www.kernel.org/doc/Documentation/DMA-API-HOWTO.txt. Allocating a new buffer ensures that it is cacheline-aligned and not shared with other data, as advised:
"Even if those classes of memory could physically work with DMA, you'd need to ensure the I/O buffers were cacheline-aligned."
"Also, systems with caches that aren't DMA-coherent will work better when the underlying buffers don't share cache lines with other data."

Is that sufficient to justify this implementation? Then I will add some more explanations along those lines to the commit message and resubmit the patch.

Alexander