From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 53CEEC38145 for ; Fri, 2 Sep 2022 11:20:21 +0000 (UTC) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id 4BF4984A77; Fri, 2 Sep 2022 13:20:19 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=none (p=none dis=none) header.from=denx.de Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=denx.de; s=phobos-20191101; t=1662117619; bh=X1jNBGF9ojeEY5lCn4IiH3rjf/KpjMNn3yZB1Dumoho=; h=Date:Subject:To:Cc:References:From:In-Reply-To:List-Id: List-Unsubscribe:List-Archive:List-Post:List-Help:List-Subscribe: From; b=pnpzimC2Q+Q7Trck5Raw5AUzTCNnA+eOdnd1OuIiGY/GqooiSAyWj+aKZixxEjUYr KPS8qS9jmci4jkQyogS4wa4TyOBkyE5sNuNs7FFwfyL4JzBeKDIBJa/uLdh4hOnaTx U2S/eW2ACDIRWT3yAF/gNcLFf/hIhd2xsKdzsyVEjx97uzFQVTceCTpuBk9xgcKLfU Jr0ctosDlyItwk4FpBvcCSE7EwpMAvaLW3YJRPCzmaQggzoNoDYJwrxfF+UXs447BT PkO42LIqXuMCN3IwKrYU/mX5chQQd05PIMvYCeHPRDwBogJCMt/3h+7oG8yJISSaUH UoZcm7X6RWztg== Received: from [127.0.0.1] (p578adb1c.dip0.t-ipconnect.de [87.138.219.28]) (using TLSv1.3 with cipher TLS_AES_128_GCM_SHA256 (128/128 bits)) (No client certificate requested) (Authenticated sender: marex@denx.de) by phobos.denx.de (Postfix) with ESMTPSA id EF8BC84A4F; Fri, 2 Sep 2022 13:20:16 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=denx.de; s=phobos-20191101; t=1662117618; bh=X1jNBGF9ojeEY5lCn4IiH3rjf/KpjMNn3yZB1Dumoho=; h=Date:Subject:To:Cc:References:From:In-Reply-To:From; b=PfTKFfJTP5F5UcZTUyQzJ+BVniiJoRyDru+/SZKGz5OxvhQqgn+UgU21MVg5WD7XA HabIRJoNfdviMIX8dLMO53zASWV8Ezr4dIwqdY/y8IQK/4IMdZI7w0yjCq8eARLHca 4SD6VhxCYUj5MRhzzJLjyXYvMNjCYZ40xFF2t64w3SIhOpHA9YFOnbaOTs3IMo2jUv E+SqJIu2J+euS7bGAc4RCu58dFnI7XjaA3S3ialXRyW8oJ8723InSmOb3kKVpHTqev AFe57x1f16hasy1rHs+yrgvt5UlOIDLrpggARF16kLoIMuwao18oWwGRSu8pUPy6M4 GAVZdlVu/RGhQ== Message-ID: <01339f13-2034-4e30-9ddb-96b99a1d1d3e@denx.de> Date: Fri, 2 Sep 2022 13:20:16 +0200 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.1.2 Subject: Re: [PATCH] ddr: socfpga: Fix integer overflow Content-Language: en-US To: Jit Loon Lim , u-boot@lists.denx.de Cc: Jagan Teki , Vignesh R , Simon , Tien Fong , Kok Kiang , Siew Chin , Sin Hui , Raaj , Dinesh , Boon Khai , Alif , Teik Heng , Hazim , Sieu Mun Tang References: <20220830064239.25340-1-jit.loon.lim@intel.com> From: Marek Vasut In-Reply-To: <20220830064239.25340-1-jit.loon.lim@intel.com> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.6 at phobos.denx.de X-Virus-Status: Clean On 8/30/22 08:42, Jit Loon Lim wrote: > From: Tien Fong Chee > > dramaddrw data structure are defined as u32. Compiler assume 32-bit > arithmetic on expression and the shifting operation to be done on a > 32-bit value. So, the expression would overflow if the shifting > is more than 32-bit. > > Signed-off-by: Tien Fong Chee > --- > drivers/ddr/altera/sdram_soc64.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/drivers/ddr/altera/sdram_soc64.c b/drivers/ddr/altera/sdram_soc64.c > index 9b1710c135..81ad02118b 100644 > --- a/drivers/ddr/altera/sdram_soc64.c > +++ b/drivers/ddr/altera/sdram_soc64.c > @@ -246,7 +246,7 @@ phys_size_t sdram_calculate_size(struct altera_sdram_plat *plat) > DRAMADDRW_CFG_ROW_ADDR_WIDTH(dramaddrw) + > DRAMADDRW_CFG_COL_ADDR_WIDTH(dramaddrw)); > > - size *= (2 << (hmc_ecc_readl(plat, DDRIOCTRL) & > + size *= ((phys_size_t)2 << (hmc_ecc_readl(plat, DDRIOCTRL) & What about using 2UL or 2ULL here, would that work too ?