From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 5FDEDC433EF for ; Sat, 9 Oct 2021 20:41:46 +0000 (UTC) Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 4ED2660F44 for ; Sat, 9 Oct 2021 20:41:44 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.4.1 mail.kernel.org 4ED2660F44 Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=ziswiler.com Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=lists.denx.de Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id EAA9683691; Sat, 9 Oct 2021 22:41:40 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=none (p=none dis=none) header.from=ziswiler.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Received: by phobos.denx.de (Postfix, from userid 109) id DEDAD83683; Sat, 9 Oct 2021 22:41:37 +0200 (CEST) Received: from mout.perfora.net (mout.perfora.net [74.208.4.196]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id 0EDF58366F for ; Sat, 9 Oct 2021 22:41:33 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=none (p=none dis=none) header.from=ziswiler.com Authentication-Results: phobos.denx.de; spf=none smtp.mailfrom=marcel@ziswiler.com Received: from localhost.localdomain ([198.134.98.50]) by mrelay.perfora.net (mreueus004 [74.208.5.2]) with ESMTPSA (Nemesis) id 1Mk0iC-1n1j5A1BZA-00kO7b; Sat, 09 Oct 2021 22:41:24 +0200 From: Marcel Ziswiler To: u-boot@lists.denx.de Cc: Heiko Thiery , Frieder Schrempf , Fabio Estevam , Stefano Babic , Marcel Ziswiler , Igor Opaniuk , Max Krummenacher , Simon Glass Subject: [PATCH v6 02/11] verdin-imx8mm: fix ethernet Date: Sat, 9 Oct 2021 22:41:04 +0200 Message-Id: <20211009204113.1208641-3-marcel@ziswiler.com> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20211009204113.1208641-1-marcel@ziswiler.com> References: <20211009204113.1208641-1-marcel@ziswiler.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Provags-ID: V03:K1:JVL/917Iw3khsM1p5UPRqFgk34WG3p9OToq4hlbrHdARF55ftaV qxJsVG9m5C/WXjTcj9B8lBVLYlWHxr8i6oTSNHAXyNTJCR6UtSNFP7fasIgdyfWYbjPVcdv 5wfMVbtUEEAoGPqAkHlV5iIcAdXiq8405vIA0lF8nZIrRzqyR7FwT9Uwq1Vq02Or/dA1MYB X75/+juukbE4QntQ6jVOQ== X-UI-Out-Filterresults: notjunk:1;V03:K0:pMW1XDdg9rU=:enl9GPXAMEuOSb3Fq4oQe9 hs4JNOb23edWK6ezFW6XS7Wbt04FyBV0t+jGHJsxyCkIg2hft2M9eK6fiBMxaOmV4v4mDjU8o 4PwkOya7tMrbNuyKrAPv2fKqlGUyx0RZuknOyZdEr9UylL4L4Jd1Dbx4729niQnwZgI+czAur XD9FpsmVbFRbSceQB3w34WcvWpyLg7fld2/pIJxCExZG3QS//n7paoZmmtiPLDAMl1YBwnBQJ L/K3o01IgcH541wCBayxIuxhYlfl9evxUUxa/g1mbXVvN8sPd7zfcwvWCnitCsnqWUsss//V7 nZJPwoGS29gGg+GMwNHooCa1h8S43GvbR7bjobefxdx2eWEOpZr1jnI0dDcSglnWuCNqHnP7D R0jlWO/Obp61FvTrJ7o1twMNG+XUr6ZfffysA4wT1MgLawW/qcK89CLoaMeEviMEhPh6K+4Lv TntDU2ZHti/BED6tWPYENWk4zHd6BP9jgF+JdxCtdto9B98ywJDUglEeoRIOxgcwRc3fKjXII QdJmG8xm5/ImWTLnawewFSK9iIdUmQUmi4T17ZrWHhMewmoULqBoWeA53PRp+qg9LvVtPsnm9 ftFSuNzGdzaSlVFzJ1RNt3LJfxxvjrpgUJKPhVSiVvdV8OR25suRdd5UrVZicPw0gBmx2LdxV 7+x6+BSsjyJ1RtQNGHwbVbiiWJWdSsvFV+6+wl/W3QHFujSr0m05zO0ikX9U+cBnDB4TJ8SWM lm8GQWZ+hZCISs9saetcMZe/u2QuPchXlrl6xA== X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.34 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.2 at phobos.denx.de X-Virus-Status: Clean From: Marcel Ziswiler Turns out Microship (formerly Micrel) meanwhile integrated proper support for the DLL setup on their KSZ9131. Unfortunately, this conflicts with our previous board code doing that. Fix this by getting rid of our board code and just relying on the generic implementation relying on rgmii-id being used as phy-mode. Fixes: commit c6df0e2ffdc4 ("net: phy: micrel: add support for DLL setup on ksz9131") Fixes: commit af2d3c91d877 ("ARM: dts: imx8mm-verdin: Set PHY mode to RGMII-ID") Signed-off-by: Marcel Ziswiler Reviewed-by: Fabio Estevam --- (no changes since v5) Changes in v5: - Drop device tree part already done by Marek's patch. - Add another fixes tag as his patch forgot the board code part. board/toradex/verdin-imx8mm/verdin-imx8mm.c | 64 --------------------- 1 file changed, 64 deletions(-) diff --git a/board/toradex/verdin-imx8mm/verdin-imx8mm.c b/board/toradex/verdin-imx8mm/verdin-imx8mm.c index 76f4a1e209a..1644f4b3081 100644 --- a/board/toradex/verdin-imx8mm/verdin-imx8mm.c +++ b/board/toradex/verdin-imx8mm/verdin-imx8mm.c @@ -36,70 +36,6 @@ static int setup_fec(void) return 0; } - -int board_phy_config(struct phy_device *phydev) -{ - int tmp; - - switch (ksz9xx1_phy_get_id(phydev) & MII_KSZ9x31_SILICON_REV_MASK) { - case PHY_ID_KSZ9031: - /* - * The PHY adds 1.2ns for the RXC and 0ns for TXC clock by - * default. The MAC and the layout don't add a skew between - * clock and data. - * Add 0.3ns for the RXC path and 0.96 + 0.42 ns (1.38 ns) for - * the TXC path to get the required clock skews. - */ - /* control data pad skew - devaddr = 0x02, register = 0x04 */ - ksz9031_phy_extended_write(phydev, 0x02, - MII_KSZ9031_EXT_RGMII_CTRL_SIG_SKEW, - MII_KSZ9031_MOD_DATA_NO_POST_INC, - 0x0070); - /* rx data pad skew - devaddr = 0x02, register = 0x05 */ - ksz9031_phy_extended_write(phydev, 0x02, - MII_KSZ9031_EXT_RGMII_RX_DATA_SKEW, - MII_KSZ9031_MOD_DATA_NO_POST_INC, - 0x7777); - /* tx data pad skew - devaddr = 0x02, register = 0x06 */ - ksz9031_phy_extended_write(phydev, 0x02, - MII_KSZ9031_EXT_RGMII_TX_DATA_SKEW, - MII_KSZ9031_MOD_DATA_NO_POST_INC, - 0x0000); - /* gtx and rx clock pad skew - devaddr = 0x02,register = 0x08 */ - ksz9031_phy_extended_write(phydev, 0x02, - MII_KSZ9031_EXT_RGMII_CLOCK_SKEW, - MII_KSZ9031_MOD_DATA_NO_POST_INC, - 0x03f4); - break; - case PHY_ID_KSZ9131: - default: - /* read rxc dll control - devaddr = 0x2, register = 0x4c */ - tmp = ksz9031_phy_extended_read(phydev, 0x02, - MII_KSZ9131_EXT_RGMII_2NS_SKEW_RXDLL, - MII_KSZ9031_MOD_DATA_NO_POST_INC); - /* disable rxdll bypass (enable 2ns skew delay on RXC) */ - tmp &= ~MII_KSZ9131_RXTXDLL_BYPASS; - /* rxc data pad skew 2ns - devaddr = 0x02, register = 0x4c */ - tmp = ksz9031_phy_extended_write(phydev, 0x02, - MII_KSZ9131_EXT_RGMII_2NS_SKEW_RXDLL, - MII_KSZ9031_MOD_DATA_NO_POST_INC, tmp); - /* read txc dll control - devaddr = 0x02, register = 0x4d */ - tmp = ksz9031_phy_extended_read(phydev, 0x02, - MII_KSZ9131_EXT_RGMII_2NS_SKEW_TXDLL, - MII_KSZ9031_MOD_DATA_NO_POST_INC); - /* disable txdll bypass (enable 2ns skew delay on TXC) */ - tmp &= ~MII_KSZ9131_RXTXDLL_BYPASS; - /* rxc data pad skew 2ns - devaddr = 0x02, register = 0x4d */ - tmp = ksz9031_phy_extended_write(phydev, 0x02, - MII_KSZ9131_EXT_RGMII_2NS_SKEW_TXDLL, - MII_KSZ9031_MOD_DATA_NO_POST_INC, tmp); - break; - } - - if (phydev->drv->config) - phydev->drv->config(phydev); - return 0; -} #endif int board_init(void) -- 2.26.2