* [PATCH 1/2] sunxi: add H2+ config option
@ 2021-10-09 12:18 Angelo Dureghello
2021-10-09 12:18 ` [PATCH 2/2] sunxi: fix non working console on uart2 Angelo Dureghello
2021-10-09 23:46 ` [PATCH 1/2] sunxi: add H2+ config option Andre Przywara
0 siblings, 2 replies; 6+ messages in thread
From: Angelo Dureghello @ 2021-10-09 12:18 UTC (permalink / raw)
To: jagan, andre.przywara, trini; +Cc: u-boot, Angelo Dureghello
Add H2+ Kconfig oiption to display proper cpu at boot time,
and for other future uses, if needed, to differentiate against H3.
The patch does not change any board defconfig at this stage,
so that nothing is broken.
Tested this CONFIG_MACH_SUN8I_H2_PLUS to work properly on
banana pi m2 zero.
Signed-off-by: Angelo Dureghello <angelo.dureghello@timesys.com>
---
arch/arm/cpu/armv7/sunxi/Makefile | 1 +
arch/arm/cpu/armv7/sunxi/psci.c | 2 ++
arch/arm/cpu/armv7/sunxi/tzpc.c | 2 +-
arch/arm/dts/Makefile | 5 +++++
arch/arm/include/asm/arch-sunxi/cpu_sun4i.h | 4 ++--
arch/arm/mach-sunxi/Kconfig | 9 +++++++++
arch/arm/mach-sunxi/board.c | 3 ++-
arch/arm/mach-sunxi/cpu_info.c | 6 ++++--
arch/arm/mach-sunxi/dram_sunxi_dw.c | 4 ++--
drivers/clk/sunxi/Makefile | 1 +
drivers/video/sunxi/sunxi_de2.c | 2 +-
11 files changed, 30 insertions(+), 9 deletions(-)
diff --git a/arch/arm/cpu/armv7/sunxi/Makefile b/arch/arm/cpu/armv7/sunxi/Makefile
index 1d40d6a18d..5fdfe45401 100644
--- a/arch/arm/cpu/armv7/sunxi/Makefile
+++ b/arch/arm/cpu/armv7/sunxi/Makefile
@@ -8,6 +8,7 @@
obj-y += timer.o
obj-$(CONFIG_MACH_SUN6I) += tzpc.o
+obj-$(CONFIG_MACH_SUN8I_H2_PLUS) += tzpc.o
obj-$(CONFIG_MACH_SUN8I_H3) += tzpc.o
ifndef CONFIG_SPL_BUILD
diff --git a/arch/arm/cpu/armv7/sunxi/psci.c b/arch/arm/cpu/armv7/sunxi/psci.c
index 1ac50f558a..bcdbe888bc 100644
--- a/arch/arm/cpu/armv7/sunxi/psci.c
+++ b/arch/arm/cpu/armv7/sunxi/psci.c
@@ -79,6 +79,7 @@ static void __secure __mdelay(u32 ms)
static void __secure clamp_release(u32 __maybe_unused *clamp)
{
#if defined(CONFIG_MACH_SUN6I) || defined(CONFIG_MACH_SUN7I) || \
+ defined(CONFIG_MACH_SUN8I_H2_PLUS) || \
defined(CONFIG_MACH_SUN8I_H3) || \
defined(CONFIG_MACH_SUN8I_R40)
u32 tmp = 0x1ff;
@@ -94,6 +95,7 @@ static void __secure clamp_release(u32 __maybe_unused *clamp)
static void __secure clamp_set(u32 __maybe_unused *clamp)
{
#if defined(CONFIG_MACH_SUN6I) || defined(CONFIG_MACH_SUN7I) || \
+ defined(CONFIG_MACH_SUN8I_H2_PLUS) || \
defined(CONFIG_MACH_SUN8I_H3) || \
defined(CONFIG_MACH_SUN8I_R40)
writel(0xff, clamp);
diff --git a/arch/arm/cpu/armv7/sunxi/tzpc.c b/arch/arm/cpu/armv7/sunxi/tzpc.c
index 0c86a21a3f..44640509ff 100644
--- a/arch/arm/cpu/armv7/sunxi/tzpc.c
+++ b/arch/arm/cpu/armv7/sunxi/tzpc.c
@@ -17,7 +17,7 @@ void tzpc_init(void)
writel(SUN6I_TZPC_DECPORT0_RTC, &tzpc->decport0_set);
#endif
-#ifdef CONFIG_MACH_SUN8I_H3
+#if defined(CONFIG_MACH_SUN8I_H2_PLUS) || defined(CONFIG_MACH_SUN8I_H3)
/* Enable non-secure access to all peripherals */
writel(SUN8I_H3_TZPC_DECPORT0_ALL, &tzpc->decport0_set);
writel(SUN8I_H3_TZPC_DECPORT1_ALL, &tzpc->decport1_set);
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index b8a382d153..2e58815769 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -598,6 +598,11 @@ dtb-$(CONFIG_MACH_SUN8I_A83T) += \
sun8i-a83t-bananapi-m3.dtb \
sun8i-a83t-cubietruck-plus.dtb \
sun8i-a83t-tbs-a711.dtb
+dtb-$(CONFIG_MACH_SUN8I_H2_PLUS) += \
+ sun8i-h2-plus-bananapi-m2-zero.dtb \
+ sun8i-h2-plus-libretech-all-h3-cc.dtb \
+ sun8i-h2-plus-orangepi-r1.dtb \
+ sun8i-h2-plus-orangepi-zero.dtb
dtb-$(CONFIG_MACH_SUN8I_H3) += \
sun8i-h2-plus-bananapi-m2-zero.dtb \
sun8i-h2-plus-libretech-all-h3-cc.dtb \
diff --git a/arch/arm/include/asm/arch-sunxi/cpu_sun4i.h b/arch/arm/include/asm/arch-sunxi/cpu_sun4i.h
index d4c795d89c..b7a66b91e7 100644
--- a/arch/arm/include/asm/arch-sunxi/cpu_sun4i.h
+++ b/arch/arm/include/asm/arch-sunxi/cpu_sun4i.h
@@ -15,7 +15,7 @@
!defined(CONFIG_MACH_SUN8I_R40) && \
!defined(CONFIG_MACH_SUN8I_V3S)
#define SUNXI_SRAM_A2_BASE 0x00040000
-#ifdef CONFIG_MACH_SUN8I_H3
+#if defined(CONFIG_MACH_SUN8I_H2_PLUS) || defined(CONFIG_MACH_SUN8I_H3)
#define SUNXI_SRAM_A2_SIZE (48 * 1024) /* 16+32 kiB */
#else
#define SUNXI_SRAM_A2_SIZE (80 * 1024) /* 16+64 kiB */
@@ -174,7 +174,7 @@ defined(CONFIG_MACH_SUN50I)
/* module sram */
#define SUNXI_SRAM_C_BASE 0x01d00000
-#ifndef CONFIG_MACH_SUN8I_H3
+#if !defined(CONFIG_MACH_SUN8I_H2_PLUS) && !defined(CONFIG_MACH_SUN8I_H3)
#define SUNXI_DE_FE0_BASE 0x01e00000
#else
#define SUNXI_TVE0_BASE 0x01e00000
diff --git a/arch/arm/mach-sunxi/Kconfig b/arch/arm/mach-sunxi/Kconfig
index 1d4a4fdd0c..eae8a0e68b 100644
--- a/arch/arm/mach-sunxi/Kconfig
+++ b/arch/arm/mach-sunxi/Kconfig
@@ -288,6 +288,15 @@ config MACH_SUN8I_A83T
select MMC_SUNXI_HAS_MODE_SWITCH
select SUPPORT_SPL
+config MACH_SUN8I_H2_PLUS
+ bool "sun8i (Allwinner H2+)"
+ select CPU_V7A
+ select CPU_V7_HAS_NONSEC
+ select CPU_V7_HAS_VIRT
+ select ARCH_SUPPORT_PSCI
+ select MACH_SUNXI_H3_H5
+ select ARMV7_BOOT_SEC_DEFAULT if OLD_SUNXI_KERNEL_COMPAT
+
config MACH_SUN8I_H3
bool "sun8i (Allwinner H3)"
select CPU_V7A
diff --git a/arch/arm/mach-sunxi/board.c b/arch/arm/mach-sunxi/board.c
index d9b04f75fc..adb63e93e7 100644
--- a/arch/arm/mach-sunxi/board.c
+++ b/arch/arm/mach-sunxi/board.c
@@ -228,7 +228,8 @@ void s_init(void)
"mcr p15, 0, r0, c1, c0, 1\n"
::: "r0");
#endif
-#if defined CONFIG_MACH_SUN6I || defined CONFIG_MACH_SUN8I_H3
+#if defined CONFIG_MACH_SUN6I || defined CONFIG_MACH_SUN8I_H2_PLUS || \
+ defined CONFIG_MACH_SUN8I_H3
/* Enable non-secure access to some peripherals */
tzpc_init();
#endif
diff --git a/arch/arm/mach-sunxi/cpu_info.c b/arch/arm/mach-sunxi/cpu_info.c
index ba33ef2430..429e5ce283 100644
--- a/arch/arm/mach-sunxi/cpu_info.c
+++ b/arch/arm/mach-sunxi/cpu_info.c
@@ -85,6 +85,8 @@ int print_cpuinfo(void)
printf("CPU: Allwinner A33 (SUN8I %04x)\n", sunxi_get_sram_id());
#elif defined CONFIG_MACH_SUN8I_A83T
printf("CPU: Allwinner A83T (SUN8I %04x)\n", sunxi_get_sram_id());
+#elif defined CONFIG_MACH_SUN8I_H2_PLUS
+ printf("CPU: Allwinner H2+ (SUN8I %04x)\n", sunxi_get_sram_id());
#elif defined CONFIG_MACH_SUN8I_H3
printf("CPU: Allwinner H3 (SUN8I %04x)\n", sunxi_get_sram_id());
#elif defined CONFIG_MACH_SUN8I_R40
@@ -109,7 +111,7 @@ int print_cpuinfo(void)
}
#endif
-#ifdef CONFIG_MACH_SUN8I_H3
+#if defined(CONFIG_MACH_SUN8I_H2_PLUS) || defined(CONFIG_MACH_SUN8I_H3)
#define SIDC_PRCTL 0x40
#define SIDC_RDKEY 0x60
@@ -143,7 +145,7 @@ int sunxi_get_sid(unsigned int *sid)
{
#ifdef CONFIG_AXP221_POWER
return axp_get_sid(sid);
-#elif defined CONFIG_MACH_SUN8I_H3
+#elif defined(CONFIG_MACH_SUN8I_H2_PLUS) || defined(CONFIG_MACH_SUN8I_H3)
/*
* H3 SID controller has a bug, which makes the initial value of
* SUNXI_SID_BASE at boot wrong.
diff --git a/arch/arm/mach-sunxi/dram_sunxi_dw.c b/arch/arm/mach-sunxi/dram_sunxi_dw.c
index 9107b114df..f28c23d0c6 100644
--- a/arch/arm/mach-sunxi/dram_sunxi_dw.c
+++ b/arch/arm/mach-sunxi/dram_sunxi_dw.c
@@ -863,7 +863,7 @@ unsigned long sunxi_dram_init(void)
}
},
-#if defined(CONFIG_MACH_SUN8I_H3)
+#if defined(CONFIG_MACH_SUN8I_H2_PLUS) || defined(CONFIG_MACH_SUN8I_H3)
.dx_read_delays = SUN8I_H3_DX_READ_DELAYS,
.dx_write_delays = SUN8I_H3_DX_WRITE_DELAYS,
.ac_delays = SUN8I_H3_AC_DELAYS,
@@ -890,7 +890,7 @@ unsigned long sunxi_dram_init(void)
* the static functions. This saves us #ifdefs, but still keeps the binary
* small.
*/
-#if defined(CONFIG_MACH_SUN8I_H3)
+#if defined(CONFIG_MACH_SUN8I_H2_PLUS) || defined(CONFIG_MACH_SUN8I_H3)
uint16_t socid = SOCID_H3;
#elif defined(CONFIG_MACH_SUN8I_R40)
uint16_t socid = SOCID_R40;
diff --git a/drivers/clk/sunxi/Makefile b/drivers/clk/sunxi/Makefile
index 4f9282a8b9..d8565b3946 100644
--- a/drivers/clk/sunxi/Makefile
+++ b/drivers/clk/sunxi/Makefile
@@ -16,6 +16,7 @@ obj-$(CONFIG_CLK_SUN8I_A83T) += clk_a83t.o
obj-$(CONFIG_CLK_SUN8I_R40) += clk_r40.o
obj-$(CONFIG_CLK_SUN8I_V3S) += clk_v3s.o
obj-$(CONFIG_CLK_SUN9I_A80) += clk_a80.o
+obj-$(CONFIG_CLK_SUN8I_H2_PLUS) += clk_h3.o
obj-$(CONFIG_CLK_SUN8I_H3) += clk_h3.o
obj-$(CONFIG_CLK_SUN50I_H6) += clk_h6.o
obj-$(CONFIG_CLK_SUN50I_H616) += clk_h616.o
diff --git a/drivers/video/sunxi/sunxi_de2.c b/drivers/video/sunxi/sunxi_de2.c
index e02d359cd2..2af2ae4cac 100644
--- a/drivers/video/sunxi/sunxi_de2.c
+++ b/drivers/video/sunxi/sunxi_de2.c
@@ -84,7 +84,7 @@ static void sunxi_de2_mode_set(int mux, const struct display_timing *mode,
u32 format;
/* enable clock */
-#ifdef CONFIG_MACH_SUN8I_H3
+#if defined(CONFIG_MACH_SUN8I_H2_PLUS) || defined(CONFIG_MACH_SUN8I_H3)
setbits_le32(&de_clk_regs->rst_cfg, (mux == 0) ? 1 : 4);
#else
setbits_le32(&de_clk_regs->rst_cfg, BIT(mux));
--
2.32.0
^ permalink raw reply related [flat|nested] 6+ messages in thread
* [PATCH 2/2] sunxi: fix non working console on uart2
2021-10-09 12:18 [PATCH 1/2] sunxi: add H2+ config option Angelo Dureghello
@ 2021-10-09 12:18 ` Angelo Dureghello
2021-10-11 0:19 ` Andre Przywara
2022-04-05 22:37 ` Andre Przywara
2021-10-09 23:46 ` [PATCH 1/2] sunxi: add H2+ config option Andre Przywara
1 sibling, 2 replies; 6+ messages in thread
From: Angelo Dureghello @ 2021-10-09 12:18 UTC (permalink / raw)
To: jagan, andre.przywara, trini; +Cc: u-boot, Angelo Dureghello
Fix non working console on uart2, that seems releated to both
Allwinner H2+ and H3.
Signed-off-by: Angelo Dureghello <angelo.dureghello@timesys.com>
---
arch/arm/include/asm/arch-sunxi/gpio.h | 1 +
arch/arm/mach-sunxi/board.c | 10 +++++++++-
2 files changed, 10 insertions(+), 1 deletion(-)
diff --git a/arch/arm/include/asm/arch-sunxi/gpio.h b/arch/arm/include/asm/arch-sunxi/gpio.h
index 2969a530ae..21fcfd5638 100644
--- a/arch/arm/include/asm/arch-sunxi/gpio.h
+++ b/arch/arm/include/asm/arch-sunxi/gpio.h
@@ -150,6 +150,7 @@ enum sunxi_gpio_number {
#define SUN7I_GPA_GMAC 5
#define SUN6I_GPA_SDC2 5
#define SUN6I_GPA_SDC3 4
+#define SUN8I_GPA_UART2 2
#define SUN8I_H3_GPA_UART0 2
#define SUN4I_GPB_PWM 2
diff --git a/arch/arm/mach-sunxi/board.c b/arch/arm/mach-sunxi/board.c
index adb63e93e7..623da744e2 100644
--- a/arch/arm/mach-sunxi/board.c
+++ b/arch/arm/mach-sunxi/board.c
@@ -145,10 +145,18 @@ static int gpio_init(void)
sunxi_gpio_set_cfgpin(SUNXI_GPG(3), SUN5I_GPG_UART1);
sunxi_gpio_set_cfgpin(SUNXI_GPG(4), SUN5I_GPG_UART1);
sunxi_gpio_set_pull(SUNXI_GPG(4), SUNXI_GPIO_PULL_UP);
-#elif CONFIG_CONS_INDEX == 3 && defined(CONFIG_MACH_SUN8I)
+#elif CONFIG_CONS_INDEX == 3 && defined(CONFIG_MACH_SUN8I) && \
+ !defined(CONFIG_MACH_SUN8I_H2_PLUS) && \
+ !defined(CONFIG_MACH_SUN8I_H3)
sunxi_gpio_set_cfgpin(SUNXI_GPB(0), SUN8I_GPB_UART2);
sunxi_gpio_set_cfgpin(SUNXI_GPB(1), SUN8I_GPB_UART2);
sunxi_gpio_set_pull(SUNXI_GPB(1), SUNXI_GPIO_PULL_UP);
+#elif CONFIG_CONS_INDEX == 3 && defined(CONFIG_MACH_SUN8I) && \
+ (defined(CONFIG_MACH_SUN8I_H2_PLUS) || \
+ defined(CONFIG_MACH_SUN8I_H3))
+ sunxi_gpio_set_cfgpin(SUNXI_GPA(0), SUN8I_GPA_UART2);
+ sunxi_gpio_set_cfgpin(SUNXI_GPA(1), SUN8I_GPA_UART2);
+ sunxi_gpio_set_pull(SUNXI_GPA(1), SUNXI_GPIO_PULL_UP);
#elif CONFIG_CONS_INDEX == 5 && defined(CONFIG_MACH_SUN8I)
sunxi_gpio_set_cfgpin(SUNXI_GPL(2), SUN8I_GPL_R_UART);
sunxi_gpio_set_cfgpin(SUNXI_GPL(3), SUN8I_GPL_R_UART);
--
2.32.0
^ permalink raw reply related [flat|nested] 6+ messages in thread
* Re: [PATCH 1/2] sunxi: add H2+ config option
2021-10-09 12:18 [PATCH 1/2] sunxi: add H2+ config option Angelo Dureghello
2021-10-09 12:18 ` [PATCH 2/2] sunxi: fix non working console on uart2 Angelo Dureghello
@ 2021-10-09 23:46 ` Andre Przywara
2021-10-10 15:14 ` Angelo Dureghello
1 sibling, 1 reply; 6+ messages in thread
From: Andre Przywara @ 2021-10-09 23:46 UTC (permalink / raw)
To: Angelo Dureghello; +Cc: jagan, trini, u-boot
On Sat, 9 Oct 2021 14:18:58 +0200
Angelo Dureghello <angelo.dureghello@timesys.com> wrote:
Hi Angelo,
> Add H2+ Kconfig oiption to display proper cpu at boot time,
> and for other future uses, if needed, to differentiate against H3.
>
> The patch does not change any board defconfig at this stage,
> so that nothing is broken.
>
> Tested this CONFIG_MACH_SUN8I_H2_PLUS to work properly on
> banana pi m2 zero.
But why? What does that fix except the hardcoded CPU output line? I
only see a lot of churn and future issues (forgetting to add
MACH_SUN8I_H2_PLUS). As far as we know the two SoCs are very close, and
are almost indistinguishable by software, that's why we treat them the
same.
So is there a good reason for differentiating the two?
If you are *really* desperate about that one "CPU: ..." line, have a
look at https://linux-sunxi.org/H3#Variants and see if you can make this
decision at runtime, check A31 and A31s for an example.
Cheers,
Andre
> Signed-off-by: Angelo Dureghello <angelo.dureghello@timesys.com>
> ---
> arch/arm/cpu/armv7/sunxi/Makefile | 1 +
> arch/arm/cpu/armv7/sunxi/psci.c | 2 ++
> arch/arm/cpu/armv7/sunxi/tzpc.c | 2 +-
> arch/arm/dts/Makefile | 5 +++++
> arch/arm/include/asm/arch-sunxi/cpu_sun4i.h | 4 ++--
> arch/arm/mach-sunxi/Kconfig | 9 +++++++++
> arch/arm/mach-sunxi/board.c | 3 ++-
> arch/arm/mach-sunxi/cpu_info.c | 6 ++++--
> arch/arm/mach-sunxi/dram_sunxi_dw.c | 4 ++--
> drivers/clk/sunxi/Makefile | 1 +
> drivers/video/sunxi/sunxi_de2.c | 2 +-
> 11 files changed, 30 insertions(+), 9 deletions(-)
>
> diff --git a/arch/arm/cpu/armv7/sunxi/Makefile b/arch/arm/cpu/armv7/sunxi/Makefile
> index 1d40d6a18d..5fdfe45401 100644
> --- a/arch/arm/cpu/armv7/sunxi/Makefile
> +++ b/arch/arm/cpu/armv7/sunxi/Makefile
> @@ -8,6 +8,7 @@
> obj-y += timer.o
>
> obj-$(CONFIG_MACH_SUN6I) += tzpc.o
> +obj-$(CONFIG_MACH_SUN8I_H2_PLUS) += tzpc.o
> obj-$(CONFIG_MACH_SUN8I_H3) += tzpc.o
>
> ifndef CONFIG_SPL_BUILD
> diff --git a/arch/arm/cpu/armv7/sunxi/psci.c b/arch/arm/cpu/armv7/sunxi/psci.c
> index 1ac50f558a..bcdbe888bc 100644
> --- a/arch/arm/cpu/armv7/sunxi/psci.c
> +++ b/arch/arm/cpu/armv7/sunxi/psci.c
> @@ -79,6 +79,7 @@ static void __secure __mdelay(u32 ms)
> static void __secure clamp_release(u32 __maybe_unused *clamp)
> {
> #if defined(CONFIG_MACH_SUN6I) || defined(CONFIG_MACH_SUN7I) || \
> + defined(CONFIG_MACH_SUN8I_H2_PLUS) || \
> defined(CONFIG_MACH_SUN8I_H3) || \
> defined(CONFIG_MACH_SUN8I_R40)
> u32 tmp = 0x1ff;
> @@ -94,6 +95,7 @@ static void __secure clamp_release(u32 __maybe_unused *clamp)
> static void __secure clamp_set(u32 __maybe_unused *clamp)
> {
> #if defined(CONFIG_MACH_SUN6I) || defined(CONFIG_MACH_SUN7I) || \
> + defined(CONFIG_MACH_SUN8I_H2_PLUS) || \
> defined(CONFIG_MACH_SUN8I_H3) || \
> defined(CONFIG_MACH_SUN8I_R40)
> writel(0xff, clamp);
> diff --git a/arch/arm/cpu/armv7/sunxi/tzpc.c b/arch/arm/cpu/armv7/sunxi/tzpc.c
> index 0c86a21a3f..44640509ff 100644
> --- a/arch/arm/cpu/armv7/sunxi/tzpc.c
> +++ b/arch/arm/cpu/armv7/sunxi/tzpc.c
> @@ -17,7 +17,7 @@ void tzpc_init(void)
> writel(SUN6I_TZPC_DECPORT0_RTC, &tzpc->decport0_set);
> #endif
>
> -#ifdef CONFIG_MACH_SUN8I_H3
> +#if defined(CONFIG_MACH_SUN8I_H2_PLUS) || defined(CONFIG_MACH_SUN8I_H3)
> /* Enable non-secure access to all peripherals */
> writel(SUN8I_H3_TZPC_DECPORT0_ALL, &tzpc->decport0_set);
> writel(SUN8I_H3_TZPC_DECPORT1_ALL, &tzpc->decport1_set);
> diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
> index b8a382d153..2e58815769 100644
> --- a/arch/arm/dts/Makefile
> +++ b/arch/arm/dts/Makefile
> @@ -598,6 +598,11 @@ dtb-$(CONFIG_MACH_SUN8I_A83T) += \
> sun8i-a83t-bananapi-m3.dtb \
> sun8i-a83t-cubietruck-plus.dtb \
> sun8i-a83t-tbs-a711.dtb
> +dtb-$(CONFIG_MACH_SUN8I_H2_PLUS) += \
> + sun8i-h2-plus-bananapi-m2-zero.dtb \
> + sun8i-h2-plus-libretech-all-h3-cc.dtb \
> + sun8i-h2-plus-orangepi-r1.dtb \
> + sun8i-h2-plus-orangepi-zero.dtb
> dtb-$(CONFIG_MACH_SUN8I_H3) += \
> sun8i-h2-plus-bananapi-m2-zero.dtb \
> sun8i-h2-plus-libretech-all-h3-cc.dtb \
> diff --git a/arch/arm/include/asm/arch-sunxi/cpu_sun4i.h b/arch/arm/include/asm/arch-sunxi/cpu_sun4i.h
> index d4c795d89c..b7a66b91e7 100644
> --- a/arch/arm/include/asm/arch-sunxi/cpu_sun4i.h
> +++ b/arch/arm/include/asm/arch-sunxi/cpu_sun4i.h
> @@ -15,7 +15,7 @@
> !defined(CONFIG_MACH_SUN8I_R40) && \
> !defined(CONFIG_MACH_SUN8I_V3S)
> #define SUNXI_SRAM_A2_BASE 0x00040000
> -#ifdef CONFIG_MACH_SUN8I_H3
> +#if defined(CONFIG_MACH_SUN8I_H2_PLUS) || defined(CONFIG_MACH_SUN8I_H3)
> #define SUNXI_SRAM_A2_SIZE (48 * 1024) /* 16+32 kiB */
> #else
> #define SUNXI_SRAM_A2_SIZE (80 * 1024) /* 16+64 kiB */
> @@ -174,7 +174,7 @@ defined(CONFIG_MACH_SUN50I)
> /* module sram */
> #define SUNXI_SRAM_C_BASE 0x01d00000
>
> -#ifndef CONFIG_MACH_SUN8I_H3
> +#if !defined(CONFIG_MACH_SUN8I_H2_PLUS) && !defined(CONFIG_MACH_SUN8I_H3)
> #define SUNXI_DE_FE0_BASE 0x01e00000
> #else
> #define SUNXI_TVE0_BASE 0x01e00000
> diff --git a/arch/arm/mach-sunxi/Kconfig b/arch/arm/mach-sunxi/Kconfig
> index 1d4a4fdd0c..eae8a0e68b 100644
> --- a/arch/arm/mach-sunxi/Kconfig
> +++ b/arch/arm/mach-sunxi/Kconfig
> @@ -288,6 +288,15 @@ config MACH_SUN8I_A83T
> select MMC_SUNXI_HAS_MODE_SWITCH
> select SUPPORT_SPL
>
> +config MACH_SUN8I_H2_PLUS
> + bool "sun8i (Allwinner H2+)"
> + select CPU_V7A
> + select CPU_V7_HAS_NONSEC
> + select CPU_V7_HAS_VIRT
> + select ARCH_SUPPORT_PSCI
> + select MACH_SUNXI_H3_H5
> + select ARMV7_BOOT_SEC_DEFAULT if OLD_SUNXI_KERNEL_COMPAT
> +
> config MACH_SUN8I_H3
> bool "sun8i (Allwinner H3)"
> select CPU_V7A
> diff --git a/arch/arm/mach-sunxi/board.c b/arch/arm/mach-sunxi/board.c
> index d9b04f75fc..adb63e93e7 100644
> --- a/arch/arm/mach-sunxi/board.c
> +++ b/arch/arm/mach-sunxi/board.c
> @@ -228,7 +228,8 @@ void s_init(void)
> "mcr p15, 0, r0, c1, c0, 1\n"
> ::: "r0");
> #endif
> -#if defined CONFIG_MACH_SUN6I || defined CONFIG_MACH_SUN8I_H3
> +#if defined CONFIG_MACH_SUN6I || defined CONFIG_MACH_SUN8I_H2_PLUS || \
> + defined CONFIG_MACH_SUN8I_H3
> /* Enable non-secure access to some peripherals */
> tzpc_init();
> #endif
> diff --git a/arch/arm/mach-sunxi/cpu_info.c b/arch/arm/mach-sunxi/cpu_info.c
> index ba33ef2430..429e5ce283 100644
> --- a/arch/arm/mach-sunxi/cpu_info.c
> +++ b/arch/arm/mach-sunxi/cpu_info.c
> @@ -85,6 +85,8 @@ int print_cpuinfo(void)
> printf("CPU: Allwinner A33 (SUN8I %04x)\n", sunxi_get_sram_id());
> #elif defined CONFIG_MACH_SUN8I_A83T
> printf("CPU: Allwinner A83T (SUN8I %04x)\n", sunxi_get_sram_id());
> +#elif defined CONFIG_MACH_SUN8I_H2_PLUS
> + printf("CPU: Allwinner H2+ (SUN8I %04x)\n", sunxi_get_sram_id());
> #elif defined CONFIG_MACH_SUN8I_H3
> printf("CPU: Allwinner H3 (SUN8I %04x)\n", sunxi_get_sram_id());
> #elif defined CONFIG_MACH_SUN8I_R40
> @@ -109,7 +111,7 @@ int print_cpuinfo(void)
> }
> #endif
>
> -#ifdef CONFIG_MACH_SUN8I_H3
> +#if defined(CONFIG_MACH_SUN8I_H2_PLUS) || defined(CONFIG_MACH_SUN8I_H3)
>
> #define SIDC_PRCTL 0x40
> #define SIDC_RDKEY 0x60
> @@ -143,7 +145,7 @@ int sunxi_get_sid(unsigned int *sid)
> {
> #ifdef CONFIG_AXP221_POWER
> return axp_get_sid(sid);
> -#elif defined CONFIG_MACH_SUN8I_H3
> +#elif defined(CONFIG_MACH_SUN8I_H2_PLUS) || defined(CONFIG_MACH_SUN8I_H3)
> /*
> * H3 SID controller has a bug, which makes the initial value of
> * SUNXI_SID_BASE at boot wrong.
> diff --git a/arch/arm/mach-sunxi/dram_sunxi_dw.c b/arch/arm/mach-sunxi/dram_sunxi_dw.c
> index 9107b114df..f28c23d0c6 100644
> --- a/arch/arm/mach-sunxi/dram_sunxi_dw.c
> +++ b/arch/arm/mach-sunxi/dram_sunxi_dw.c
> @@ -863,7 +863,7 @@ unsigned long sunxi_dram_init(void)
> }
> },
>
> -#if defined(CONFIG_MACH_SUN8I_H3)
> +#if defined(CONFIG_MACH_SUN8I_H2_PLUS) || defined(CONFIG_MACH_SUN8I_H3)
> .dx_read_delays = SUN8I_H3_DX_READ_DELAYS,
> .dx_write_delays = SUN8I_H3_DX_WRITE_DELAYS,
> .ac_delays = SUN8I_H3_AC_DELAYS,
> @@ -890,7 +890,7 @@ unsigned long sunxi_dram_init(void)
> * the static functions. This saves us #ifdefs, but still keeps the binary
> * small.
> */
> -#if defined(CONFIG_MACH_SUN8I_H3)
> +#if defined(CONFIG_MACH_SUN8I_H2_PLUS) || defined(CONFIG_MACH_SUN8I_H3)
> uint16_t socid = SOCID_H3;
> #elif defined(CONFIG_MACH_SUN8I_R40)
> uint16_t socid = SOCID_R40;
> diff --git a/drivers/clk/sunxi/Makefile b/drivers/clk/sunxi/Makefile
> index 4f9282a8b9..d8565b3946 100644
> --- a/drivers/clk/sunxi/Makefile
> +++ b/drivers/clk/sunxi/Makefile
> @@ -16,6 +16,7 @@ obj-$(CONFIG_CLK_SUN8I_A83T) += clk_a83t.o
> obj-$(CONFIG_CLK_SUN8I_R40) += clk_r40.o
> obj-$(CONFIG_CLK_SUN8I_V3S) += clk_v3s.o
> obj-$(CONFIG_CLK_SUN9I_A80) += clk_a80.o
> +obj-$(CONFIG_CLK_SUN8I_H2_PLUS) += clk_h3.o
> obj-$(CONFIG_CLK_SUN8I_H3) += clk_h3.o
> obj-$(CONFIG_CLK_SUN50I_H6) += clk_h6.o
> obj-$(CONFIG_CLK_SUN50I_H616) += clk_h616.o
> diff --git a/drivers/video/sunxi/sunxi_de2.c b/drivers/video/sunxi/sunxi_de2.c
> index e02d359cd2..2af2ae4cac 100644
> --- a/drivers/video/sunxi/sunxi_de2.c
> +++ b/drivers/video/sunxi/sunxi_de2.c
> @@ -84,7 +84,7 @@ static void sunxi_de2_mode_set(int mux, const struct display_timing *mode,
> u32 format;
>
> /* enable clock */
> -#ifdef CONFIG_MACH_SUN8I_H3
> +#if defined(CONFIG_MACH_SUN8I_H2_PLUS) || defined(CONFIG_MACH_SUN8I_H3)
> setbits_le32(&de_clk_regs->rst_cfg, (mux == 0) ? 1 : 4);
> #else
> setbits_le32(&de_clk_regs->rst_cfg, BIT(mux));
^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATCH 1/2] sunxi: add H2+ config option
2021-10-09 23:46 ` [PATCH 1/2] sunxi: add H2+ config option Andre Przywara
@ 2021-10-10 15:14 ` Angelo Dureghello
0 siblings, 0 replies; 6+ messages in thread
From: Angelo Dureghello @ 2021-10-10 15:14 UTC (permalink / raw)
To: Andre Przywara; +Cc: Jagan Teki, Tom Rini, U-Boot-Denx
Hi Andre,
On Sun, Oct 10, 2021 at 1:48 AM Andre Przywara <andre.przywara@arm.com> wrote:
>
> On Sat, 9 Oct 2021 14:18:58 +0200
> Angelo Dureghello <angelo.dureghello@timesys.com> wrote:
>
> Hi Angelo,
>
> > Add H2+ Kconfig oiption to display proper cpu at boot time,
> > and for other future uses, if needed, to differentiate against H3.
> >
> > The patch does not change any board defconfig at this stage,
> > so that nothing is broken.
> >
> > Tested this CONFIG_MACH_SUN8I_H2_PLUS to work properly on
> > banana pi m2 zero.
>
> But why? What does that fix except the hardcoded CPU output line? I
> only see a lot of churn and future issues (forgetting to add
> MACH_SUN8I_H2_PLUS). As far as we know the two SoCs are very close, and
> are almost indistinguishable by software, that's why we treat them the
> same.
> So is there a good reason for differentiating the two?
> If you are *really* desperate about that one "CPU: ..." line, have a
> look at https://linux-sunxi.org/H3#Variants and see if you can make this
> decision at runtime, check A31 and A31s for an example.
This "desperate" sounds a bit ugly :) I can live without of course :) .
I faced the uart2 console not working issue (fixed in 2/2), and initially
thought it was a H2+ / H3 difference, but it was not.
Anyway, i finally thought that a differentiation may be useful If not,
just trow the patch in the bin.
In the case you may still be interested differentiating the two just to
print cpu model, or any future need, an alternative safer proposal may be
something like:
config MACH_SUN8I_H2_PLUS
select MACH_SUN8I_H3
>
> Cheers,
> Andre
>
cheers,
angelo
> > Signed-off-by: Angelo Dureghello <angelo.dureghello@timesys.com>
> > ---
> > arch/arm/cpu/armv7/sunxi/Makefile | 1 +
> > arch/arm/cpu/armv7/sunxi/psci.c | 2 ++
> > arch/arm/cpu/armv7/sunxi/tzpc.c | 2 +-
> > arch/arm/dts/Makefile | 5 +++++
> > arch/arm/include/asm/arch-sunxi/cpu_sun4i.h | 4 ++--
> > arch/arm/mach-sunxi/Kconfig | 9 +++++++++
> > arch/arm/mach-sunxi/board.c | 3 ++-
> > arch/arm/mach-sunxi/cpu_info.c | 6 ++++--
> > arch/arm/mach-sunxi/dram_sunxi_dw.c | 4 ++--
> > drivers/clk/sunxi/Makefile | 1 +
> > drivers/video/sunxi/sunxi_de2.c | 2 +-
> > 11 files changed, 30 insertions(+), 9 deletions(-)
> >
> > diff --git a/arch/arm/cpu/armv7/sunxi/Makefile b/arch/arm/cpu/armv7/sunxi/Makefile
> > index 1d40d6a18d..5fdfe45401 100644
> > --- a/arch/arm/cpu/armv7/sunxi/Makefile
> > +++ b/arch/arm/cpu/armv7/sunxi/Makefile
> > @@ -8,6 +8,7 @@
> > obj-y += timer.o
> >
> > obj-$(CONFIG_MACH_SUN6I) += tzpc.o
> > +obj-$(CONFIG_MACH_SUN8I_H2_PLUS) += tzpc.o
> > obj-$(CONFIG_MACH_SUN8I_H3) += tzpc.o
> >
> > ifndef CONFIG_SPL_BUILD
> > diff --git a/arch/arm/cpu/armv7/sunxi/psci.c b/arch/arm/cpu/armv7/sunxi/psci.c
> > index 1ac50f558a..bcdbe888bc 100644
> > --- a/arch/arm/cpu/armv7/sunxi/psci.c
> > +++ b/arch/arm/cpu/armv7/sunxi/psci.c
> > @@ -79,6 +79,7 @@ static void __secure __mdelay(u32 ms)
> > static void __secure clamp_release(u32 __maybe_unused *clamp)
> > {
> > #if defined(CONFIG_MACH_SUN6I) || defined(CONFIG_MACH_SUN7I) || \
> > + defined(CONFIG_MACH_SUN8I_H2_PLUS) || \
> > defined(CONFIG_MACH_SUN8I_H3) || \
> > defined(CONFIG_MACH_SUN8I_R40)
> > u32 tmp = 0x1ff;
> > @@ -94,6 +95,7 @@ static void __secure clamp_release(u32 __maybe_unused *clamp)
> > static void __secure clamp_set(u32 __maybe_unused *clamp)
> > {
> > #if defined(CONFIG_MACH_SUN6I) || defined(CONFIG_MACH_SUN7I) || \
> > + defined(CONFIG_MACH_SUN8I_H2_PLUS) || \
> > defined(CONFIG_MACH_SUN8I_H3) || \
> > defined(CONFIG_MACH_SUN8I_R40)
> > writel(0xff, clamp);
> > diff --git a/arch/arm/cpu/armv7/sunxi/tzpc.c b/arch/arm/cpu/armv7/sunxi/tzpc.c
> > index 0c86a21a3f..44640509ff 100644
> > --- a/arch/arm/cpu/armv7/sunxi/tzpc.c
> > +++ b/arch/arm/cpu/armv7/sunxi/tzpc.c
> > @@ -17,7 +17,7 @@ void tzpc_init(void)
> > writel(SUN6I_TZPC_DECPORT0_RTC, &tzpc->decport0_set);
> > #endif
> >
> > -#ifdef CONFIG_MACH_SUN8I_H3
> > +#if defined(CONFIG_MACH_SUN8I_H2_PLUS) || defined(CONFIG_MACH_SUN8I_H3)
> > /* Enable non-secure access to all peripherals */
> > writel(SUN8I_H3_TZPC_DECPORT0_ALL, &tzpc->decport0_set);
> > writel(SUN8I_H3_TZPC_DECPORT1_ALL, &tzpc->decport1_set);
> > diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
> > index b8a382d153..2e58815769 100644
> > --- a/arch/arm/dts/Makefile
> > +++ b/arch/arm/dts/Makefile
> > @@ -598,6 +598,11 @@ dtb-$(CONFIG_MACH_SUN8I_A83T) += \
> > sun8i-a83t-bananapi-m3.dtb \
> > sun8i-a83t-cubietruck-plus.dtb \
> > sun8i-a83t-tbs-a711.dtb
> > +dtb-$(CONFIG_MACH_SUN8I_H2_PLUS) += \
> > + sun8i-h2-plus-bananapi-m2-zero.dtb \
> > + sun8i-h2-plus-libretech-all-h3-cc.dtb \
> > + sun8i-h2-plus-orangepi-r1.dtb \
> > + sun8i-h2-plus-orangepi-zero.dtb
> > dtb-$(CONFIG_MACH_SUN8I_H3) += \
> > sun8i-h2-plus-bananapi-m2-zero.dtb \
> > sun8i-h2-plus-libretech-all-h3-cc.dtb \
> > diff --git a/arch/arm/include/asm/arch-sunxi/cpu_sun4i.h b/arch/arm/include/asm/arch-sunxi/cpu_sun4i.h
> > index d4c795d89c..b7a66b91e7 100644
> > --- a/arch/arm/include/asm/arch-sunxi/cpu_sun4i.h
> > +++ b/arch/arm/include/asm/arch-sunxi/cpu_sun4i.h
> > @@ -15,7 +15,7 @@
> > !defined(CONFIG_MACH_SUN8I_R40) && \
> > !defined(CONFIG_MACH_SUN8I_V3S)
> > #define SUNXI_SRAM_A2_BASE 0x00040000
> > -#ifdef CONFIG_MACH_SUN8I_H3
> > +#if defined(CONFIG_MACH_SUN8I_H2_PLUS) || defined(CONFIG_MACH_SUN8I_H3)
> > #define SUNXI_SRAM_A2_SIZE (48 * 1024) /* 16+32 kiB */
> > #else
> > #define SUNXI_SRAM_A2_SIZE (80 * 1024) /* 16+64 kiB */
> > @@ -174,7 +174,7 @@ defined(CONFIG_MACH_SUN50I)
> > /* module sram */
> > #define SUNXI_SRAM_C_BASE 0x01d00000
> >
> > -#ifndef CONFIG_MACH_SUN8I_H3
> > +#if !defined(CONFIG_MACH_SUN8I_H2_PLUS) && !defined(CONFIG_MACH_SUN8I_H3)
> > #define SUNXI_DE_FE0_BASE 0x01e00000
> > #else
> > #define SUNXI_TVE0_BASE 0x01e00000
> > diff --git a/arch/arm/mach-sunxi/Kconfig b/arch/arm/mach-sunxi/Kconfig
> > index 1d4a4fdd0c..eae8a0e68b 100644
> > --- a/arch/arm/mach-sunxi/Kconfig
> > +++ b/arch/arm/mach-sunxi/Kconfig
> > @@ -288,6 +288,15 @@ config MACH_SUN8I_A83T
> > select MMC_SUNXI_HAS_MODE_SWITCH
> > select SUPPORT_SPL
> >
> > +config MACH_SUN8I_H2_PLUS
> > + bool "sun8i (Allwinner H2+)"
> > + select CPU_V7A
> > + select CPU_V7_HAS_NONSEC
> > + select CPU_V7_HAS_VIRT
> > + select ARCH_SUPPORT_PSCI
> > + select MACH_SUNXI_H3_H5
> > + select ARMV7_BOOT_SEC_DEFAULT if OLD_SUNXI_KERNEL_COMPAT
> > +
> > config MACH_SUN8I_H3
> > bool "sun8i (Allwinner H3)"
> > select CPU_V7A
> > diff --git a/arch/arm/mach-sunxi/board.c b/arch/arm/mach-sunxi/board.c
> > index d9b04f75fc..adb63e93e7 100644
> > --- a/arch/arm/mach-sunxi/board.c
> > +++ b/arch/arm/mach-sunxi/board.c
> > @@ -228,7 +228,8 @@ void s_init(void)
> > "mcr p15, 0, r0, c1, c0, 1\n"
> > ::: "r0");
> > #endif
> > -#if defined CONFIG_MACH_SUN6I || defined CONFIG_MACH_SUN8I_H3
> > +#if defined CONFIG_MACH_SUN6I || defined CONFIG_MACH_SUN8I_H2_PLUS || \
> > + defined CONFIG_MACH_SUN8I_H3
> > /* Enable non-secure access to some peripherals */
> > tzpc_init();
> > #endif
> > diff --git a/arch/arm/mach-sunxi/cpu_info.c b/arch/arm/mach-sunxi/cpu_info.c
> > index ba33ef2430..429e5ce283 100644
> > --- a/arch/arm/mach-sunxi/cpu_info.c
> > +++ b/arch/arm/mach-sunxi/cpu_info.c
> > @@ -85,6 +85,8 @@ int print_cpuinfo(void)
> > printf("CPU: Allwinner A33 (SUN8I %04x)\n", sunxi_get_sram_id());
> > #elif defined CONFIG_MACH_SUN8I_A83T
> > printf("CPU: Allwinner A83T (SUN8I %04x)\n", sunxi_get_sram_id());
> > +#elif defined CONFIG_MACH_SUN8I_H2_PLUS
> > + printf("CPU: Allwinner H2+ (SUN8I %04x)\n", sunxi_get_sram_id());
> > #elif defined CONFIG_MACH_SUN8I_H3
> > printf("CPU: Allwinner H3 (SUN8I %04x)\n", sunxi_get_sram_id());
> > #elif defined CONFIG_MACH_SUN8I_R40
> > @@ -109,7 +111,7 @@ int print_cpuinfo(void)
> > }
> > #endif
> >
> > -#ifdef CONFIG_MACH_SUN8I_H3
> > +#if defined(CONFIG_MACH_SUN8I_H2_PLUS) || defined(CONFIG_MACH_SUN8I_H3)
> >
> > #define SIDC_PRCTL 0x40
> > #define SIDC_RDKEY 0x60
> > @@ -143,7 +145,7 @@ int sunxi_get_sid(unsigned int *sid)
> > {
> > #ifdef CONFIG_AXP221_POWER
> > return axp_get_sid(sid);
> > -#elif defined CONFIG_MACH_SUN8I_H3
> > +#elif defined(CONFIG_MACH_SUN8I_H2_PLUS) || defined(CONFIG_MACH_SUN8I_H3)
> > /*
> > * H3 SID controller has a bug, which makes the initial value of
> > * SUNXI_SID_BASE at boot wrong.
> > diff --git a/arch/arm/mach-sunxi/dram_sunxi_dw.c b/arch/arm/mach-sunxi/dram_sunxi_dw.c
> > index 9107b114df..f28c23d0c6 100644
> > --- a/arch/arm/mach-sunxi/dram_sunxi_dw.c
> > +++ b/arch/arm/mach-sunxi/dram_sunxi_dw.c
> > @@ -863,7 +863,7 @@ unsigned long sunxi_dram_init(void)
> > }
> > },
> >
> > -#if defined(CONFIG_MACH_SUN8I_H3)
> > +#if defined(CONFIG_MACH_SUN8I_H2_PLUS) || defined(CONFIG_MACH_SUN8I_H3)
> > .dx_read_delays = SUN8I_H3_DX_READ_DELAYS,
> > .dx_write_delays = SUN8I_H3_DX_WRITE_DELAYS,
> > .ac_delays = SUN8I_H3_AC_DELAYS,
> > @@ -890,7 +890,7 @@ unsigned long sunxi_dram_init(void)
> > * the static functions. This saves us #ifdefs, but still keeps the binary
> > * small.
> > */
> > -#if defined(CONFIG_MACH_SUN8I_H3)
> > +#if defined(CONFIG_MACH_SUN8I_H2_PLUS) || defined(CONFIG_MACH_SUN8I_H3)
> > uint16_t socid = SOCID_H3;
> > #elif defined(CONFIG_MACH_SUN8I_R40)
> > uint16_t socid = SOCID_R40;
> > diff --git a/drivers/clk/sunxi/Makefile b/drivers/clk/sunxi/Makefile
> > index 4f9282a8b9..d8565b3946 100644
> > --- a/drivers/clk/sunxi/Makefile
> > +++ b/drivers/clk/sunxi/Makefile
> > @@ -16,6 +16,7 @@ obj-$(CONFIG_CLK_SUN8I_A83T) += clk_a83t.o
> > obj-$(CONFIG_CLK_SUN8I_R40) += clk_r40.o
> > obj-$(CONFIG_CLK_SUN8I_V3S) += clk_v3s.o
> > obj-$(CONFIG_CLK_SUN9I_A80) += clk_a80.o
> > +obj-$(CONFIG_CLK_SUN8I_H2_PLUS) += clk_h3.o
> > obj-$(CONFIG_CLK_SUN8I_H3) += clk_h3.o
> > obj-$(CONFIG_CLK_SUN50I_H6) += clk_h6.o
> > obj-$(CONFIG_CLK_SUN50I_H616) += clk_h616.o
> > diff --git a/drivers/video/sunxi/sunxi_de2.c b/drivers/video/sunxi/sunxi_de2.c
> > index e02d359cd2..2af2ae4cac 100644
> > --- a/drivers/video/sunxi/sunxi_de2.c
> > +++ b/drivers/video/sunxi/sunxi_de2.c
> > @@ -84,7 +84,7 @@ static void sunxi_de2_mode_set(int mux, const struct display_timing *mode,
> > u32 format;
> >
> > /* enable clock */
> > -#ifdef CONFIG_MACH_SUN8I_H3
> > +#if defined(CONFIG_MACH_SUN8I_H2_PLUS) || defined(CONFIG_MACH_SUN8I_H3)
> > setbits_le32(&de_clk_regs->rst_cfg, (mux == 0) ? 1 : 4);
> > #else
> > setbits_le32(&de_clk_regs->rst_cfg, BIT(mux));
>
--
Angelo Dureghello
Timesys
e. angelo.dureghello@timesys.com
^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATCH 2/2] sunxi: fix non working console on uart2
2021-10-09 12:18 ` [PATCH 2/2] sunxi: fix non working console on uart2 Angelo Dureghello
@ 2021-10-11 0:19 ` Andre Przywara
2022-04-05 22:37 ` Andre Przywara
1 sibling, 0 replies; 6+ messages in thread
From: Andre Przywara @ 2021-10-11 0:19 UTC (permalink / raw)
To: Angelo Dureghello; +Cc: jagan, trini, u-boot
On Sat, 9 Oct 2021 14:18:59 +0200
Angelo Dureghello <angelo.dureghello@timesys.com> wrote:
Hi Angelo,
can you please mention the H3 in the subject line, so it's more obvious
that's it's only about one SoC?
> Fix non working console on uart2, that seems releated to both
> Allwinner H2+ and H3.
>
> Signed-off-by: Angelo Dureghello <angelo.dureghello@timesys.com>
> ---
> arch/arm/include/asm/arch-sunxi/gpio.h | 1 +
> arch/arm/mach-sunxi/board.c | 10 +++++++++-
> 2 files changed, 10 insertions(+), 1 deletion(-)
>
> diff --git a/arch/arm/include/asm/arch-sunxi/gpio.h b/arch/arm/include/asm/arch-sunxi/gpio.h
> index 2969a530ae..21fcfd5638 100644
> --- a/arch/arm/include/asm/arch-sunxi/gpio.h
> +++ b/arch/arm/include/asm/arch-sunxi/gpio.h
> @@ -150,6 +150,7 @@ enum sunxi_gpio_number {
> #define SUN7I_GPA_GMAC 5
> #define SUN6I_GPA_SDC2 5
> #define SUN6I_GPA_SDC3 4
> +#define SUN8I_GPA_UART2 2
> #define SUN8I_H3_GPA_UART0 2
>
> #define SUN4I_GPB_PWM 2
> diff --git a/arch/arm/mach-sunxi/board.c b/arch/arm/mach-sunxi/board.c
> index adb63e93e7..623da744e2 100644
> --- a/arch/arm/mach-sunxi/board.c
> +++ b/arch/arm/mach-sunxi/board.c
> @@ -145,10 +145,18 @@ static int gpio_init(void)
> sunxi_gpio_set_cfgpin(SUNXI_GPG(3), SUN5I_GPG_UART1);
> sunxi_gpio_set_cfgpin(SUNXI_GPG(4), SUN5I_GPG_UART1);
> sunxi_gpio_set_pull(SUNXI_GPG(4), SUNXI_GPIO_PULL_UP);
> -#elif CONFIG_CONS_INDEX == 3 && defined(CONFIG_MACH_SUN8I)
> +#elif CONFIG_CONS_INDEX == 3 && defined(CONFIG_MACH_SUN8I) && \
> + !defined(CONFIG_MACH_SUN8I_H2_PLUS) && \
> + !defined(CONFIG_MACH_SUN8I_H3)
> sunxi_gpio_set_cfgpin(SUNXI_GPB(0), SUN8I_GPB_UART2);
> sunxi_gpio_set_cfgpin(SUNXI_GPB(1), SUN8I_GPB_UART2);
> sunxi_gpio_set_pull(SUNXI_GPB(1), SUNXI_GPIO_PULL_UP);
> +#elif CONFIG_CONS_INDEX == 3 && defined(CONFIG_MACH_SUN8I) && \
CONFIG_MACH_SUN8I is redundant if you use CONFIG_MACH_SUN8I_H3 below,
so drop the former. And if you rearrange this section to come before
the existing one above, the #elif will save you changes there.
Also please drop CONFIG_MACH_SUN8I_H2_PLUS.
But the actual gist of this patch (UART2 is on portA) is indeed
correct.
Cheers,
Andre
> + (defined(CONFIG_MACH_SUN8I_H2_PLUS) || \
> + defined(CONFIG_MACH_SUN8I_H3))
> + sunxi_gpio_set_cfgpin(SUNXI_GPA(0), SUN8I_GPA_UART2);
> + sunxi_gpio_set_cfgpin(SUNXI_GPA(1), SUN8I_GPA_UART2);
> + sunxi_gpio_set_pull(SUNXI_GPA(1), SUNXI_GPIO_PULL_UP);
> #elif CONFIG_CONS_INDEX == 5 && defined(CONFIG_MACH_SUN8I)
> sunxi_gpio_set_cfgpin(SUNXI_GPL(2), SUN8I_GPL_R_UART);
> sunxi_gpio_set_cfgpin(SUNXI_GPL(3), SUN8I_GPL_R_UART);
^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATCH 2/2] sunxi: fix non working console on uart2
2021-10-09 12:18 ` [PATCH 2/2] sunxi: fix non working console on uart2 Angelo Dureghello
2021-10-11 0:19 ` Andre Przywara
@ 2022-04-05 22:37 ` Andre Przywara
1 sibling, 0 replies; 6+ messages in thread
From: Andre Przywara @ 2022-04-05 22:37 UTC (permalink / raw)
To: Angelo Dureghello; +Cc: jagan, trini, u-boot
On Sat, 9 Oct 2021 14:18:59 +0200
Angelo Dureghello <angelo.dureghello@timesys.com> wrote:
> Fix non working console on uart2, that seems releated to both
> Allwinner H2+ and H3.
>
> Signed-off-by: Angelo Dureghello <angelo.dureghello@timesys.com>
Dropped CONFIG_MACH_SUN8I_H2_PLUS, reordered as suggested in the other
reply, and applied to sunxi/master.
Thanks!
Andre
> ---
> arch/arm/include/asm/arch-sunxi/gpio.h | 1 +
> arch/arm/mach-sunxi/board.c | 10 +++++++++-
> 2 files changed, 10 insertions(+), 1 deletion(-)
>
> diff --git a/arch/arm/include/asm/arch-sunxi/gpio.h b/arch/arm/include/asm/arch-sunxi/gpio.h
> index 2969a530ae..21fcfd5638 100644
> --- a/arch/arm/include/asm/arch-sunxi/gpio.h
> +++ b/arch/arm/include/asm/arch-sunxi/gpio.h
> @@ -150,6 +150,7 @@ enum sunxi_gpio_number {
> #define SUN7I_GPA_GMAC 5
> #define SUN6I_GPA_SDC2 5
> #define SUN6I_GPA_SDC3 4
> +#define SUN8I_GPA_UART2 2
> #define SUN8I_H3_GPA_UART0 2
>
> #define SUN4I_GPB_PWM 2
> diff --git a/arch/arm/mach-sunxi/board.c b/arch/arm/mach-sunxi/board.c
> index adb63e93e7..623da744e2 100644
> --- a/arch/arm/mach-sunxi/board.c
> +++ b/arch/arm/mach-sunxi/board.c
> @@ -145,10 +145,18 @@ static int gpio_init(void)
> sunxi_gpio_set_cfgpin(SUNXI_GPG(3), SUN5I_GPG_UART1);
> sunxi_gpio_set_cfgpin(SUNXI_GPG(4), SUN5I_GPG_UART1);
> sunxi_gpio_set_pull(SUNXI_GPG(4), SUNXI_GPIO_PULL_UP);
> -#elif CONFIG_CONS_INDEX == 3 && defined(CONFIG_MACH_SUN8I)
> +#elif CONFIG_CONS_INDEX == 3 && defined(CONFIG_MACH_SUN8I) && \
> + !defined(CONFIG_MACH_SUN8I_H2_PLUS) && \
> + !defined(CONFIG_MACH_SUN8I_H3)
> sunxi_gpio_set_cfgpin(SUNXI_GPB(0), SUN8I_GPB_UART2);
> sunxi_gpio_set_cfgpin(SUNXI_GPB(1), SUN8I_GPB_UART2);
> sunxi_gpio_set_pull(SUNXI_GPB(1), SUNXI_GPIO_PULL_UP);
> +#elif CONFIG_CONS_INDEX == 3 && defined(CONFIG_MACH_SUN8I) && \
> + (defined(CONFIG_MACH_SUN8I_H2_PLUS) || \
> + defined(CONFIG_MACH_SUN8I_H3))
> + sunxi_gpio_set_cfgpin(SUNXI_GPA(0), SUN8I_GPA_UART2);
> + sunxi_gpio_set_cfgpin(SUNXI_GPA(1), SUN8I_GPA_UART2);
> + sunxi_gpio_set_pull(SUNXI_GPA(1), SUNXI_GPIO_PULL_UP);
> #elif CONFIG_CONS_INDEX == 5 && defined(CONFIG_MACH_SUN8I)
> sunxi_gpio_set_cfgpin(SUNXI_GPL(2), SUN8I_GPL_R_UART);
> sunxi_gpio_set_cfgpin(SUNXI_GPL(3), SUN8I_GPL_R_UART);
^ permalink raw reply [flat|nested] 6+ messages in thread
end of thread, other threads:[~2022-04-05 23:03 UTC | newest]
Thread overview: 6+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2021-10-09 12:18 [PATCH 1/2] sunxi: add H2+ config option Angelo Dureghello
2021-10-09 12:18 ` [PATCH 2/2] sunxi: fix non working console on uart2 Angelo Dureghello
2021-10-11 0:19 ` Andre Przywara
2022-04-05 22:37 ` Andre Przywara
2021-10-09 23:46 ` [PATCH 1/2] sunxi: add H2+ config option Andre Przywara
2021-10-10 15:14 ` Angelo Dureghello
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