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* [PATCH 1/3 v4] riscv: Remove OF_PRIOR_STAGE from RISC-V boards
@ 2021-10-11 21:00 Ilias Apalodimas
  2021-10-11 21:00 ` [PATCH 2/3] board: arm: Remove OF_PRIOR_STAGE from the remaining Arm boards Ilias Apalodimas
                   ` (3 more replies)
  0 siblings, 4 replies; 9+ messages in thread
From: Ilias Apalodimas @ 2021-10-11 21:00 UTC (permalink / raw)
  To: sjg
  Cc: Ilias Apalodimas, Bharat Gooty, Rayagonda Kokatanur, Rick Chen,
	Leo, Thomas Fitzsimmons, Bin Meng, Green Wan, Marek Behún,
	Lukas Auer, Brad Kim, Heinrich Schuchardt, Dimitri John Ledkov,
	David Abdurachmanov, u-boot

At some point back in 2018 prior_stage_fdt_address and OF_PRIOR_STAGE got
introduced,  in order to support a DTB handed over by an earlier stage boo
loader.  However we have another option in the Kconfig (OF_BOARD) which has
identical semantics.

On RISC-V some of the boards pick up the DTB from a1 and copy it in their
private gd_t.  Apart from that they copy it to prior_stage_fdt_address,  if
the Kconfig option is selected, which is unnecessary.

So let's switch the config option for those boards to OF_BOARD and define
the required board_fdt_blob_setup() for them.

Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
---
Changes since v3:
- fixed a wanring for qemu 32bit compilation
- corected commit message
- removed empty line from qemu-riscv.c
Changes since v2:
- Adjusted board_fdt_blob_setup() for ax25-ae350 to cover OF_BOARD cases 
Changes since v1:
- Remove the sifive unleashed/unmatched changes,  since they'll be handled
 arch/riscv/cpu/cpu.c                    | 3 ---
 arch/riscv/cpu/start.S                  | 5 -----
 arch/riscv/dts/binman.dtsi              | 6 +++---
 board/AndesTech/ax25-ae350/ax25-ae350.c | 7 ++++++-
 board/emulation/qemu-riscv/qemu-riscv.c | 8 ++++++++
 configs/ae350_rv32_defconfig            | 2 +-
 configs/ae350_rv32_spl_defconfig        | 2 +-
 configs/ae350_rv64_defconfig            | 2 +-
 configs/ae350_rv64_spl_defconfig        | 2 +-
 configs/qemu-riscv32_defconfig          | 2 +-
 configs/qemu-riscv32_smode_defconfig    | 2 +-
 configs/qemu-riscv32_spl_defconfig      | 2 +-
 configs/qemu-riscv64_defconfig          | 2 +-
 configs/qemu-riscv64_smode_defconfig    | 2 +-
 configs/qemu-riscv64_spl_defconfig      | 2 +-
 dts/Kconfig                             | 2 +-
 16 files changed, 28 insertions(+), 23 deletions(-)

diff --git a/arch/riscv/cpu/cpu.c b/arch/riscv/cpu/cpu.c
index c894ac10b536..e16f1df30254 100644
--- a/arch/riscv/cpu/cpu.c
+++ b/arch/riscv/cpu/cpu.c
@@ -16,9 +16,6 @@
  * The variables here must be stored in the data section since they are used
  * before the bss section is available.
  */
-#ifdef CONFIG_OF_PRIOR_STAGE
-phys_addr_t prior_stage_fdt_address __section(".data");
-#endif
 #ifndef CONFIG_XIP
 u32 hart_lottery __section(".data") = 0;
 
diff --git a/arch/riscv/cpu/start.S b/arch/riscv/cpu/start.S
index 308b0a97a58f..76850ec9be2c 100644
--- a/arch/riscv/cpu/start.S
+++ b/arch/riscv/cpu/start.S
@@ -142,11 +142,6 @@ call_harts_early_init:
 	bnez	tp, secondary_hart_loop
 #endif
 
-#ifdef CONFIG_OF_PRIOR_STAGE
-	la	t0, prior_stage_fdt_address
-	SREG	s1, 0(t0)
-#endif
-
 	jal	board_init_f_init_reserve
 
 	SREG	s1, GD_FIRMWARE_FDT_ADDR(gp)
diff --git a/arch/riscv/dts/binman.dtsi b/arch/riscv/dts/binman.dtsi
index d26cfdb78a9e..5757ef65ea4b 100644
--- a/arch/riscv/dts/binman.dtsi
+++ b/arch/riscv/dts/binman.dtsi
@@ -48,7 +48,7 @@
 					};
 				};
 
-#ifndef CONFIG_OF_PRIOR_STAGE
+#ifndef CONFIG_OF_BOARD
 				@fdt-SEQ {
 					description = "NAME";
 					type = "flat_dt";
@@ -60,7 +60,7 @@
 			configurations {
 				default = "conf-1";
 
-#ifndef CONFIG_OF_PRIOR_STAGE
+#ifndef CONFIG_OF_BOARD
 				@conf-SEQ {
 #else
 				conf-1 {
@@ -68,7 +68,7 @@
 					description = "NAME";
 					firmware = "opensbi";
 					loadables = "uboot";
-#ifndef CONFIG_OF_PRIOR_STAGE
+#ifndef CONFIG_OF_BOARD
 					fdt = "fdt-SEQ";
 #endif
 				};
diff --git a/board/AndesTech/ax25-ae350/ax25-ae350.c b/board/AndesTech/ax25-ae350/ax25-ae350.c
index 81b0ee992372..b0b6e20e9f9d 100644
--- a/board/AndesTech/ax25-ae350/ax25-ae350.c
+++ b/board/AndesTech/ax25-ae350/ax25-ae350.c
@@ -21,7 +21,6 @@
 
 DECLARE_GLOBAL_DATA_PTR;
 
-extern phys_addr_t prior_stage_fdt_address;
 /*
  * Miscellaneous platform dependent initializations
  */
@@ -57,7 +56,13 @@ ulong board_flash_get_legacy(ulong base, int banknum, flash_info_t *info)
 
 void *board_fdt_blob_setup(void)
 {
+#if CONFIG_IS_ENABLED(OF_BOARD)
+	return (void *)(ulong)gd->arch.firmware_fdt_addr;
+#elif CONFIG_IS_ENABLED(OF_SEPARATE)
 	return (void *)CONFIG_SYS_FDT_BASE;
+#else
+	return NULL;
+#endif
 }
 
 int smc_init(void)
diff --git a/board/emulation/qemu-riscv/qemu-riscv.c b/board/emulation/qemu-riscv/qemu-riscv.c
index dcfd3f20bee6..2a26e265ffb9 100644
--- a/board/emulation/qemu-riscv/qemu-riscv.c
+++ b/board/emulation/qemu-riscv/qemu-riscv.c
@@ -14,6 +14,8 @@
 #include <virtio_types.h>
 #include <virtio.h>
 
+DECLARE_GLOBAL_DATA_PTR;
+
 int board_init(void)
 {
 	/*
@@ -69,3 +71,9 @@ int board_fit_config_name_match(const char *name)
 	return 0;
 }
 #endif
+
+void *board_fdt_blob_setup(void)
+{
+	/* Stored the DTB address there during our init */
+	return (void *)(ulong)gd->arch.firmware_fdt_addr;
+}
diff --git a/configs/ae350_rv32_defconfig b/configs/ae350_rv32_defconfig
index 4e7a1686a64d..8b6c0b8a4a0a 100644
--- a/configs/ae350_rv32_defconfig
+++ b/configs/ae350_rv32_defconfig
@@ -15,7 +15,7 @@ CONFIG_CMD_SF_TEST=y
 # CONFIG_CMD_SETEXPR is not set
 CONFIG_BOOTP_PREFER_SERVERIP=y
 CONFIG_CMD_CACHE=y
-CONFIG_OF_PRIOR_STAGE=y
+CONFIG_OF_BOARD=y
 CONFIG_ENV_OVERWRITE=y
 CONFIG_ENV_IS_IN_SPI_FLASH=y
 CONFIG_SYS_RELOC_GD_ENV_ADDR=y
diff --git a/configs/ae350_rv32_spl_defconfig b/configs/ae350_rv32_spl_defconfig
index 34c6af6e7e17..a0fe9b9a71df 100644
--- a/configs/ae350_rv32_spl_defconfig
+++ b/configs/ae350_rv32_spl_defconfig
@@ -19,7 +19,7 @@ CONFIG_CMD_SF_TEST=y
 # CONFIG_CMD_SETEXPR is not set
 CONFIG_BOOTP_PREFER_SERVERIP=y
 CONFIG_CMD_CACHE=y
-CONFIG_OF_PRIOR_STAGE=y
+CONFIG_OF_BOARD=y
 CONFIG_ENV_OVERWRITE=y
 CONFIG_ENV_IS_IN_SPI_FLASH=y
 CONFIG_BOOTP_SEND_HOSTNAME=y
diff --git a/configs/ae350_rv64_defconfig b/configs/ae350_rv64_defconfig
index 05eee371ac2f..cb23cbd3d95e 100644
--- a/configs/ae350_rv64_defconfig
+++ b/configs/ae350_rv64_defconfig
@@ -16,7 +16,7 @@ CONFIG_CMD_SF_TEST=y
 # CONFIG_CMD_SETEXPR is not set
 CONFIG_BOOTP_PREFER_SERVERIP=y
 CONFIG_CMD_CACHE=y
-CONFIG_OF_PRIOR_STAGE=y
+CONFIG_OF_BOARD=y
 CONFIG_ENV_OVERWRITE=y
 CONFIG_ENV_IS_IN_SPI_FLASH=y
 CONFIG_SYS_RELOC_GD_ENV_ADDR=y
diff --git a/configs/ae350_rv64_spl_defconfig b/configs/ae350_rv64_spl_defconfig
index 9cd7848c92eb..9ad312505db3 100644
--- a/configs/ae350_rv64_spl_defconfig
+++ b/configs/ae350_rv64_spl_defconfig
@@ -20,7 +20,7 @@ CONFIG_CMD_SF_TEST=y
 # CONFIG_CMD_SETEXPR is not set
 CONFIG_BOOTP_PREFER_SERVERIP=y
 CONFIG_CMD_CACHE=y
-CONFIG_OF_PRIOR_STAGE=y
+CONFIG_OF_BOARD=y
 CONFIG_ENV_OVERWRITE=y
 CONFIG_ENV_IS_IN_SPI_FLASH=y
 CONFIG_BOOTP_SEND_HOSTNAME=y
diff --git a/configs/qemu-riscv32_defconfig b/configs/qemu-riscv32_defconfig
index 8ac16cf4186e..6fe133c268d7 100644
--- a/configs/qemu-riscv32_defconfig
+++ b/configs/qemu-riscv32_defconfig
@@ -9,6 +9,6 @@ CONFIG_DISPLAY_BOARDINFO=y
 CONFIG_CMD_BOOTEFI_SELFTEST=y
 CONFIG_CMD_NVEDIT_EFI=y
 # CONFIG_CMD_MII is not set
-CONFIG_OF_PRIOR_STAGE=y
+CONFIG_OF_BOARD=y
 CONFIG_SYS_RELOC_GD_ENV_ADDR=y
 CONFIG_DM_MTD=y
diff --git a/configs/qemu-riscv32_smode_defconfig b/configs/qemu-riscv32_smode_defconfig
index 05eda439618f..c67e8206d1ab 100644
--- a/configs/qemu-riscv32_smode_defconfig
+++ b/configs/qemu-riscv32_smode_defconfig
@@ -10,6 +10,6 @@ CONFIG_DISPLAY_BOARDINFO=y
 CONFIG_CMD_BOOTEFI_SELFTEST=y
 CONFIG_CMD_NVEDIT_EFI=y
 # CONFIG_CMD_MII is not set
-CONFIG_OF_PRIOR_STAGE=y
+CONFIG_OF_BOARD=y
 CONFIG_SYS_RELOC_GD_ENV_ADDR=y
 CONFIG_DM_MTD=y
diff --git a/configs/qemu-riscv32_spl_defconfig b/configs/qemu-riscv32_spl_defconfig
index ee81e552724d..77e81fac3af7 100644
--- a/configs/qemu-riscv32_spl_defconfig
+++ b/configs/qemu-riscv32_spl_defconfig
@@ -12,6 +12,6 @@ CONFIG_DISPLAY_CPUINFO=y
 CONFIG_DISPLAY_BOARDINFO=y
 CONFIG_CMD_SBI=y
 # CONFIG_CMD_MII is not set
-CONFIG_OF_PRIOR_STAGE=y
+CONFIG_OF_BOARD=y
 CONFIG_SYS_RELOC_GD_ENV_ADDR=y
 CONFIG_DM_MTD=y
diff --git a/configs/qemu-riscv64_defconfig b/configs/qemu-riscv64_defconfig
index daf5d655d01f..90e87672aab0 100644
--- a/configs/qemu-riscv64_defconfig
+++ b/configs/qemu-riscv64_defconfig
@@ -10,6 +10,6 @@ CONFIG_DISPLAY_BOARDINFO=y
 CONFIG_CMD_BOOTEFI_SELFTEST=y
 CONFIG_CMD_NVEDIT_EFI=y
 # CONFIG_CMD_MII is not set
-CONFIG_OF_PRIOR_STAGE=y
+CONFIG_OF_BOARD=y
 CONFIG_SYS_RELOC_GD_ENV_ADDR=y
 CONFIG_DM_MTD=y
diff --git a/configs/qemu-riscv64_smode_defconfig b/configs/qemu-riscv64_smode_defconfig
index 4a6416e2540b..0a8393903368 100644
--- a/configs/qemu-riscv64_smode_defconfig
+++ b/configs/qemu-riscv64_smode_defconfig
@@ -13,6 +13,6 @@ CONFIG_DISPLAY_BOARDINFO=y
 CONFIG_CMD_BOOTEFI_SELFTEST=y
 CONFIG_CMD_NVEDIT_EFI=y
 # CONFIG_CMD_MII is not set
-CONFIG_OF_PRIOR_STAGE=y
+CONFIG_OF_BOARD=y
 CONFIG_SYS_RELOC_GD_ENV_ADDR=y
 CONFIG_DM_MTD=y
diff --git a/configs/qemu-riscv64_spl_defconfig b/configs/qemu-riscv64_spl_defconfig
index 429d4d814e65..a15e82dd3ee1 100644
--- a/configs/qemu-riscv64_spl_defconfig
+++ b/configs/qemu-riscv64_spl_defconfig
@@ -13,6 +13,6 @@ CONFIG_DISPLAY_CPUINFO=y
 CONFIG_DISPLAY_BOARDINFO=y
 CONFIG_CMD_SBI=y
 # CONFIG_CMD_MII is not set
-CONFIG_OF_PRIOR_STAGE=y
+CONFIG_OF_BOARD=y
 CONFIG_SYS_RELOC_GD_ENV_ADDR=y
 CONFIG_DM_MTD=y
diff --git a/dts/Kconfig b/dts/Kconfig
index dabe0080c1ef..39270b47f9f0 100644
--- a/dts/Kconfig
+++ b/dts/Kconfig
@@ -107,7 +107,7 @@ config OF_EMBED
 	  Boards in the mainline U-Boot tree should not use it.
 
 config OF_BOARD
-	bool "Provided by the board at runtime"
+	bool "Provided by the board (e.g a previous loader) at runtime"
 	depends on !SANDBOX
 	help
 	  If this option is enabled, the device tree will be provided by
-- 
2.33.0


^ permalink raw reply related	[flat|nested] 9+ messages in thread

end of thread, other threads:[~2021-10-19 13:09 UTC | newest]

Thread overview: 9+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2021-10-11 21:00 [PATCH 1/3 v4] riscv: Remove OF_PRIOR_STAGE from RISC-V boards Ilias Apalodimas
2021-10-11 21:00 ` [PATCH 2/3] board: arm: Remove OF_PRIOR_STAGE from the remaining Arm boards Ilias Apalodimas
2021-10-19 13:08   ` Tom Rini
2021-10-11 21:00 ` [PATCH 3/3] treewide: Remove OF_PRIOR_STAGE Ilias Apalodimas
2021-10-11 21:31   ` Simon Glass
2021-10-11 21:39     ` Ilias Apalodimas
2021-10-19 13:08   ` Tom Rini
2021-10-12  9:17 ` [PATCH 1/3 v4] riscv: Remove OF_PRIOR_STAGE from RISC-V boards Leo Liang
2021-10-19 13:08 ` Tom Rini

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