From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id DA0E7C433EF for ; Thu, 16 Dec 2021 12:28:11 +0000 (UTC) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id 7180983086; Thu, 16 Dec 2021 13:28:05 +0100 (CET) Authentication-Results: phobos.denx.de; dmarc=pass (p=quarantine dis=none) header.from=ti.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Authentication-Results: phobos.denx.de; dkim=pass (1024-bit key; unprotected) header.d=ti.com header.i=@ti.com header.b="PkRiV/C+"; dkim-atps=neutral Received: by phobos.denx.de (Postfix, from userid 109) id 46EE682EBB; Thu, 16 Dec 2021 13:27:59 +0100 (CET) Received: from fllv0016.ext.ti.com (fllv0016.ext.ti.com [198.47.19.142]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id 13AD08303A for ; Thu, 16 Dec 2021 13:27:46 +0100 (CET) Authentication-Results: phobos.denx.de; dmarc=pass (p=quarantine dis=none) header.from=ti.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=a-govindraju@ti.com Received: from fllv0034.itg.ti.com ([10.64.40.246]) by fllv0016.ext.ti.com (8.15.2/8.15.2) with ESMTP id 1BGCRc1I096589; Thu, 16 Dec 2021 06:27:38 -0600 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1639657658; bh=SetGufOsN/7s2MLbez4qM4ZiejIseRmfz5j9tkPqYic=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=PkRiV/C+c8NY9BBn5uvCuixS0kTDIUhY5Np6atglRGX5hDfLRUVmhNWNSk58E8oId 6jVREWV4GJT5oZg7sRemX8kEIwYZcwe3LzAaPAPZpyR2/eRIo5iSR3sj6KsNvqDH2Z OA63uO2RLXSNX4PZKZPrYKNsV4BFBQvWjGM0lS+w= Received: from DFLE100.ent.ti.com (dfle100.ent.ti.com [10.64.6.21]) by fllv0034.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 1BGCRcKn083361 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Thu, 16 Dec 2021 06:27:38 -0600 Received: from DFLE100.ent.ti.com (10.64.6.21) by DFLE100.ent.ti.com (10.64.6.21) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2308.14; Thu, 16 Dec 2021 06:27:38 -0600 Received: from lelv0326.itg.ti.com (10.180.67.84) by DFLE100.ent.ti.com (10.64.6.21) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2308.14 via Frontend Transport; Thu, 16 Dec 2021 06:27:38 -0600 Received: from gsaswath-HP-ProBook-640-G5.dal.design.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by lelv0326.itg.ti.com (8.15.2/8.15.2) with ESMTP id 1BGCREpv032333; Thu, 16 Dec 2021 06:27:32 -0600 From: Aswath Govindraju To: CC: , Wolfgang Denk , Hari Nagalla , Keerthy , David Huang , Dave Gerlach , Suman Anna , Nishanth Menon , Tero Kristo , Kishon Vijay Abraham I , Vignesh Raghavendra , Christian Hewitt , Tim Harvey , Peter Robinson , Jagan Teki , Neil Armstrong , Fabio Estevam , Andre Przywara , Jaehoon Chung , Sean Anderson , Lukasz Majewski , Aswath Govindraju Subject: [PATCH 03/20] ram: k3-ddrss: Add support for multiple instances of DDR subsystems Date: Thu, 16 Dec 2021 17:56:57 +0530 Message-ID: <20211216122714.4734-4-a-govindraju@ti.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20211216122714.4734-1-a-govindraju@ti.com> References: <20211216122714.4734-1-a-govindraju@ti.com> MIME-Version: 1.0 Content-Type: text/plain X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.38 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.2 at phobos.denx.de X-Virus-Status: Clean The current driver only supports single instance of DRR subsystem. Add support for probing multiple instances of DDR subsystem. Signed-off-by: Aswath Govindraju --- drivers/ram/k3-ddrss/k3-ddrss.c | 138 ++++++++++++++++++++------------ 1 file changed, 87 insertions(+), 51 deletions(-) diff --git a/drivers/ram/k3-ddrss/k3-ddrss.c b/drivers/ram/k3-ddrss/k3-ddrss.c index 95b5cf9128b0..96084d0b83d9 100644 --- a/drivers/ram/k3-ddrss/k3-ddrss.c +++ b/drivers/ram/k3-ddrss/k3-ddrss.c @@ -30,6 +30,9 @@ #define DDRSS_V2A_R1_MAT_REG 0x0020 #define DDRSS_ECC_CTRL_REG 0x0120 +#define SINGLE_DDR_SUBSYSTEM 0x1 +#define MULTI_DDR_SUBSYSTEM 0x2 + struct k3_ddrss_desc { struct udevice *dev; void __iomem *ddrss_ss_cfg; @@ -42,14 +45,12 @@ struct k3_ddrss_desc { u32 ddr_freq2; u32 ddr_fhs_cnt; struct udevice *vtt_supply; + u32 instance; + lpddr4_obj *driverdt; + lpddr4_config config; + lpddr4_privatedata pd; }; -static lpddr4_obj *driverdt; -static lpddr4_config config; -static lpddr4_privatedata pd; - -static struct k3_ddrss_desc *ddrss; - struct reginitdata { u32 ctl_regs[LPDDR4_INTR_CTL_REG_COUNT]; u16 ctl_regs_offs[LPDDR4_INTR_CTL_REG_COUNT]; @@ -83,15 +84,16 @@ struct reginitdata { offset = offset * 10 + (*i - '0'); } \ } while (0) -static u32 k3_lpddr4_read_ddr_type(void) +static u32 k3_lpddr4_read_ddr_type(const lpddr4_privatedata *pd) { u32 status = 0U; u32 offset = 0U; u32 regval = 0U; u32 dram_class = 0U; + struct k3_ddrss_desc *ddrss = (struct k3_ddrss_desc *)pd->ddr_instance; TH_OFFSET_FROM_REG(LPDDR4__DRAM_CLASS__REG, CTL_SHIFT, offset); - status = driverdt->readreg(&pd, LPDDR4_CTL_REGS, offset, ®val); + status = ddrss->driverdt->readreg(pd, LPDDR4_CTL_REGS, offset, ®val); if (status > 0U) { printf("%s: Failed to read DRAM_CLASS\n", __func__); hang(); @@ -102,23 +104,23 @@ static u32 k3_lpddr4_read_ddr_type(void) return dram_class; } -static void k3_lpddr4_freq_update(void) +static void k3_lpddr4_freq_update(struct k3_ddrss_desc *ddrss) { unsigned int req_type, counter; for (counter = 0; counter < ddrss->ddr_fhs_cnt; counter++) { if (wait_for_bit_le32(ddrss->ddrss_ctrl_mmr + - CTRLMMR_DDR4_FSP_CLKCHNG_REQ_OFFS, 0x80, + CTRLMMR_DDR4_FSP_CLKCHNG_REQ_OFFS + ddrss->instance * 0x10, 0x80, true, 10000, false)) { printf("Timeout during frequency handshake\n"); hang(); } req_type = readl(ddrss->ddrss_ctrl_mmr + - CTRLMMR_DDR4_FSP_CLKCHNG_REQ_OFFS) & 0x03; + CTRLMMR_DDR4_FSP_CLKCHNG_REQ_OFFS + ddrss->instance * 0x10) & 0x03; - debug("%s: received freq change req: req type = %d, req no. = %d\n", - __func__, req_type, counter); + debug("%s: received freq change req: req type = %d, req no. = %d, instance = %d\n", + __func__, req_type, counter, ddrss->instance); if (req_type == 1) clk_set_rate(&ddrss->ddr_clk, ddrss->ddr_freq1); @@ -132,31 +134,32 @@ static void k3_lpddr4_freq_update(void) printf("%s: Invalid freq request type\n", __func__); writel(0x1, ddrss->ddrss_ctrl_mmr + - CTRLMMR_DDR4_FSP_CLKCHNG_ACK_OFFS); + CTRLMMR_DDR4_FSP_CLKCHNG_ACK_OFFS + ddrss->instance * 0x10); if (wait_for_bit_le32(ddrss->ddrss_ctrl_mmr + - CTRLMMR_DDR4_FSP_CLKCHNG_REQ_OFFS, 0x80, + CTRLMMR_DDR4_FSP_CLKCHNG_REQ_OFFS + ddrss->instance * 0x10, 0x80, false, 10, false)) { printf("Timeout during frequency handshake\n"); hang(); } writel(0x0, ddrss->ddrss_ctrl_mmr + - CTRLMMR_DDR4_FSP_CLKCHNG_ACK_OFFS); + CTRLMMR_DDR4_FSP_CLKCHNG_ACK_OFFS + ddrss->instance * 0x10); } } -static void k3_lpddr4_ack_freq_upd_req(void) +static void k3_lpddr4_ack_freq_upd_req(const lpddr4_privatedata *pd) { u32 dram_class; + struct k3_ddrss_desc *ddrss = (struct k3_ddrss_desc *)pd->ddr_instance; debug("--->>> LPDDR4 Initialization is in progress ... <<<---\n"); - dram_class = k3_lpddr4_read_ddr_type(); + dram_class = k3_lpddr4_read_ddr_type(pd); switch (dram_class) { case DENALI_CTL_0_DRAM_CLASS_DDR4: break; case DENALI_CTL_0_DRAM_CLASS_LPDDR4: - k3_lpddr4_freq_update(); + k3_lpddr4_freq_update(ddrss); break; default: printf("Unrecognized dram_class cannot update frequency!\n"); @@ -167,8 +170,9 @@ static int k3_ddrss_init_freq(struct k3_ddrss_desc *ddrss) { u32 dram_class; int ret; + lpddr4_privatedata *pd = &ddrss->pd; - dram_class = k3_lpddr4_read_ddr_type(); + dram_class = k3_lpddr4_read_ddr_type(pd); switch (dram_class) { case DENALI_CTL_0_DRAM_CLASS_DDR4: @@ -196,7 +200,7 @@ static void k3_lpddr4_info_handler(const lpddr4_privatedata *pd, lpddr4_infotype infotype) { if (infotype == LPDDR4_DRV_SOC_PLL_UPDATE) - k3_lpddr4_ack_freq_upd_req(); + k3_lpddr4_ack_freq_upd_req(pd); } static int k3_ddrss_power_on(struct k3_ddrss_desc *ddrss) @@ -235,6 +239,7 @@ static int k3_ddrss_power_on(struct k3_ddrss_desc *ddrss) static int k3_ddrss_ofdata_to_priv(struct udevice *dev) { struct k3_ddrss_desc *ddrss = dev_get_priv(dev); + struct k3_ddrss_data *ddrss_data = (struct k3_ddrss_data *)dev_get_driver_data(dev); phys_addr_t reg; int ret; @@ -274,6 +279,17 @@ static int k3_ddrss_ofdata_to_priv(struct udevice *dev) if (ret) dev_err(dev, "clk get failed for osc clk %d\n", ret); + /* Reading instance number for multi ddr subystems */ + if (ddrss_data->flags & MULTI_DDR_SUBSYSTEM) { + ret = dev_read_u32(dev, "instance", &ddrss->instance); + if (ret) { + dev_err(dev, "missing instance property"); + return -EINVAL; + } + } else { + ddrss->instance = 0; + } + ret = dev_read_u32(dev, "ti,ddr-freq1", &ddrss->ddr_freq1); if (ret) dev_err(dev, "ddr freq1 not populated %d\n", ret); @@ -289,12 +305,13 @@ static int k3_ddrss_ofdata_to_priv(struct udevice *dev) return ret; } -void k3_lpddr4_probe(void) +void k3_lpddr4_probe(struct k3_ddrss_desc *ddrss) { u32 status = 0U; u16 configsize = 0U; + lpddr4_config *config = &ddrss->config; - status = driverdt->probe(&config, &configsize); + status = ddrss->driverdt->probe(config, &configsize); if ((status != 0) || (configsize != sizeof(lpddr4_privatedata)) || (configsize > SRAM_MAX)) { @@ -305,25 +322,30 @@ void k3_lpddr4_probe(void) } } -void k3_lpddr4_init(void) +void k3_lpddr4_init(struct k3_ddrss_desc *ddrss) { u32 status = 0U; + lpddr4_config *config = &ddrss->config; + lpddr4_obj *driverdt = ddrss->driverdt; + lpddr4_privatedata *pd = &ddrss->pd; - if ((sizeof(pd) != sizeof(lpddr4_privatedata)) - || (sizeof(pd) > SRAM_MAX)) { + if ((sizeof(*pd) != sizeof(lpddr4_privatedata)) || (sizeof(*pd) > SRAM_MAX)) { printf("%s: FAIL\n", __func__); hang(); } - config.ctlbase = (struct lpddr4_ctlregs_s *)ddrss->ddrss_ss_cfg; - config.infohandler = (lpddr4_infocallback) k3_lpddr4_info_handler; + config->ctlbase = (struct lpddr4_ctlregs_s *)ddrss->ddrss_ss_cfg; + config->infohandler = (lpddr4_infocallback) k3_lpddr4_info_handler; + + status = driverdt->init(pd, config); - status = driverdt->init(&pd, &config); + /* linking ddr instance to lpddr4 */ + pd->ddr_instance = (void *)ddrss; if ((status > 0U) || - (pd.ctlbase != (struct lpddr4_ctlregs_s *)config.ctlbase) || - (pd.ctlinterrupthandler != config.ctlinterrupthandler) || - (pd.phyindepinterrupthandler != config.phyindepinterrupthandler)) { + (pd->ctlbase != (struct lpddr4_ctlregs_s *)config->ctlbase) || + (pd->ctlinterrupthandler != config->ctlinterrupthandler) || + (pd->phyindepinterrupthandler != config->phyindepinterrupthandler)) { printf("%s: FAIL\n", __func__); hang(); } else { @@ -331,7 +353,8 @@ void k3_lpddr4_init(void) } } -void populate_data_array_from_dt(struct reginitdata *reginit_data) +void populate_data_array_from_dt(struct k3_ddrss_desc *ddrss, + struct reginitdata *reginit_data) { int ret, i; @@ -363,22 +386,24 @@ void populate_data_array_from_dt(struct reginitdata *reginit_data) reginit_data->phy_regs_offs[i] = i; } -void k3_lpddr4_hardware_reg_init(void) +void k3_lpddr4_hardware_reg_init(struct k3_ddrss_desc *ddrss) { u32 status = 0U; struct reginitdata reginitdata; + lpddr4_obj *driverdt = ddrss->driverdt; + lpddr4_privatedata *pd = &ddrss->pd; - populate_data_array_from_dt(®initdata); + populate_data_array_from_dt(ddrss, ®initdata); - status = driverdt->writectlconfig(&pd, reginitdata.ctl_regs, + status = driverdt->writectlconfig(pd, reginitdata.ctl_regs, reginitdata.ctl_regs_offs, LPDDR4_INTR_CTL_REG_COUNT); if (!status) - status = driverdt->writephyindepconfig(&pd, reginitdata.pi_regs, + status = driverdt->writephyindepconfig(pd, reginitdata.pi_regs, reginitdata.pi_regs_offs, LPDDR4_INTR_PHY_INDEP_REG_COUNT); if (!status) - status = driverdt->writephyconfig(&pd, reginitdata.phy_regs, + status = driverdt->writephyconfig(pd, reginitdata.phy_regs, reginitdata.phy_regs_offs, LPDDR4_INTR_PHY_REG_COUNT); if (status) { @@ -387,27 +412,29 @@ void k3_lpddr4_hardware_reg_init(void) } } -void k3_lpddr4_start(void) +void k3_lpddr4_start(struct k3_ddrss_desc *ddrss) { u32 status = 0U; u32 regval = 0U; u32 offset = 0U; + lpddr4_obj *driverdt = ddrss->driverdt; + lpddr4_privatedata *pd = &ddrss->pd; TH_OFFSET_FROM_REG(LPDDR4__START__REG, CTL_SHIFT, offset); - status = driverdt->readreg(&pd, LPDDR4_CTL_REGS, offset, ®val); + status = driverdt->readreg(pd, LPDDR4_CTL_REGS, offset, ®val); if ((status > 0U) || ((regval & TH_FLD_MASK(LPDDR4__START__FLD)) != 0U)) { printf("%s: Pre start FAIL\n", __func__); hang(); } - status = driverdt->start(&pd); + status = driverdt->start(pd); if (status > 0U) { printf("%s: FAIL\n", __func__); hang(); } - status = driverdt->readreg(&pd, LPDDR4_CTL_REGS, offset, ®val); + status = driverdt->readreg(pd, LPDDR4_CTL_REGS, offset, ®val); if ((status > 0U) || ((regval & TH_FLD_MASK(LPDDR4__START__FLD)) != 1U)) { printf("%s: Post start FAIL\n", __func__); hang(); @@ -419,8 +446,7 @@ void k3_lpddr4_start(void) static int k3_ddrss_probe(struct udevice *dev) { int ret; - - ddrss = dev_get_priv(dev); + struct k3_ddrss_desc *ddrss = dev_get_priv(dev); debug("%s(dev=%p)\n", __func__, dev); @@ -439,16 +465,17 @@ static int k3_ddrss_probe(struct udevice *dev) writel(0x0, ddrss->ddrss_ss_cfg + DDRSS_ECC_CTRL_REG); #endif - driverdt = lpddr4_getinstance(); - k3_lpddr4_probe(); - k3_lpddr4_init(); - k3_lpddr4_hardware_reg_init(); + ddrss->driverdt = lpddr4_getinstance(); + + k3_lpddr4_probe(ddrss); + k3_lpddr4_init(ddrss); + k3_lpddr4_hardware_reg_init(ddrss); ret = k3_ddrss_init_freq(ddrss); if (ret) return ret; - k3_lpddr4_start(); + k3_lpddr4_start(ddrss); return ret; } @@ -462,9 +489,18 @@ static struct ram_ops k3_ddrss_ops = { .get_info = k3_ddrss_get_info, }; +static const struct k3_ddrss_data k3_data = { + .flags = SINGLE_DDR_SUBSYSTEM, +}; + +static const struct k3_ddrss_data j721s2_data = { + .flags = MULTI_DDR_SUBSYSTEM, +}; + static const struct udevice_id k3_ddrss_ids[] = { - {.compatible = "ti,am64-ddrss"}, - {.compatible = "ti,j721e-ddrss"}, + {.compatible = "ti,am64-ddrss", .data = (ulong)&k3_data, }, + {.compatible = "ti,j721e-ddrss", .data = (ulong)&k3_data, }, + {.compatible = "ti,j721s2-ddrss", .data = (ulong)&j721s2_data, }, {} }; -- 2.17.1