From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 02F58C433EF for ; Fri, 17 Dec 2021 10:40:29 +0000 (UTC) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id 9A10F83007; Fri, 17 Dec 2021 11:40:27 +0100 (CET) Authentication-Results: phobos.denx.de; dmarc=pass (p=quarantine dis=none) header.from=ti.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Authentication-Results: phobos.denx.de; dkim=pass (1024-bit key; unprotected) header.d=ti.com header.i=@ti.com header.b="q7VYO/ra"; dkim-atps=neutral Received: by phobos.denx.de (Postfix, from userid 109) id 8481C83003; Fri, 17 Dec 2021 11:40:25 +0100 (CET) Received: from fllv0015.ext.ti.com (fllv0015.ext.ti.com [198.47.19.141]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id 8F86E8303B for ; Fri, 17 Dec 2021 11:40:21 +0100 (CET) Authentication-Results: phobos.denx.de; dmarc=pass (p=quarantine dis=none) header.from=ti.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=p.yadav@ti.com Received: from lelv0266.itg.ti.com ([10.180.67.225]) by fllv0015.ext.ti.com (8.15.2/8.15.2) with ESMTP id 1BHAeH79085872; Fri, 17 Dec 2021 04:40:17 -0600 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1639737617; bh=gHKtpXSzU3FHrTPzJbAg0UL51+a2gjhMYnNozO4dOYo=; h=Date:From:To:CC:Subject:References:In-Reply-To; b=q7VYO/rawcq3Ktzq8bq7n/G9nKP/PdurqHUJMvj4OXYgmd+gVoNv74Q4JxZt06Oks ezef2VIloRIGM6sglQaRF3mVIAYvSeh5tc1BqmMUl+/1xdrAm7sUEl5fhRRlTurdVS fR9Er2WEvDJltF/BNXd7SLf08J4PfxaETn4x8/ZM= Received: from DFLE109.ent.ti.com (dfle109.ent.ti.com [10.64.6.30]) by lelv0266.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 1BHAeHrY014733 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Fri, 17 Dec 2021 04:40:17 -0600 Received: from DFLE102.ent.ti.com (10.64.6.23) by DFLE109.ent.ti.com (10.64.6.30) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2308.14; Fri, 17 Dec 2021 04:40:16 -0600 Received: from lelv0326.itg.ti.com (10.180.67.84) by DFLE102.ent.ti.com (10.64.6.23) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2308.14 via Frontend Transport; Fri, 17 Dec 2021 04:40:16 -0600 Received: from localhost (ileax41-snat.itg.ti.com [10.172.224.153]) by lelv0326.itg.ti.com (8.15.2/8.15.2) with ESMTP id 1BHAeG80121440; Fri, 17 Dec 2021 04:40:16 -0600 Date: Fri, 17 Dec 2021 16:10:15 +0530 From: Pratyush Yadav To: CC: , , , Subject: Re: [PATCH v2 3/4] Revert "mtd: spi-nor-core: Perform a Soft Reset on boot" Message-ID: <20211217104013.edh4ide4t2jd5que@ti.com> References: <20211103234950.202289-1-tudor.ambarus@microchip.com> <20211103234950.202289-4-tudor.ambarus@microchip.com> <20211109192616.gd6eoodyywcmzsav@ti.com> <20211112131311.tv6wbcrqcfdqhk7o@ti.com> <20211216184532.6buckneyluk7jta4@ti.com> <7ad443bb-a0be-7eef-9d65-a21c3cc7412f@microchip.com> MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Disposition: inline In-Reply-To: <7ad443bb-a0be-7eef-9d65-a21c3cc7412f@microchip.com> User-Agent: NeoMutt/20171215 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.38 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.2 at phobos.denx.de X-Virus-Status: Clean On 17/12/21 06:27AM, Tudor.Ambarus@microchip.com wrote: > On 12/16/21 8:45 PM, Pratyush Yadav wrote: > >>>> > >>>>> > >>>>>> SFDP signature to determine the mode in which the flash is configured: > >>>>>> ''' > >>>>>> try to read the SFDP signature (see 6.1) in 4-4-4 mode, if that fails > >>>>>> try 2-2-2 mode, and if that fails try 1-1-1 mode. For Octal devices, > >>>>>> these typically support SFDP read operation in both 1S-1S-1S mode and > >>>>>> 8D-8D-8D mode. If the host controller does not know exactly which > >>>>>> protocol mode is used for SFDP in 8D-8D-8D mode, this information can be > >>>>>> found by reading SFDP in 1S-1S-1S mode first. (To read an unknown device > >>>>>> directly in 8D-8D-8D mode, the host controller may read from address 0, > >>>>>> and count the number of dummy clocks required before the SFDP signature > >>>>>> is received.) > >>>>>> ''' > >>>> > >>>> Below is the approach for the flashes that are not SFDP compliant: > >>>> > >>>>>> If the flash does not support SFDP at all, one should introduce dedicated > >>>>>> configs for each reset type and issue just the needed reset command. > >>> > >>> There are some problems with this approach. What if we have two flashes > >>> on the board and both use different reset types? How do we figure out > >>> which reset to apply? This applies to the current implementation as > >>> well. If there are two flashes then it will issue the reset to both even > >>> if one of them does not support/need it. > >> > >> One would have to choose the NOR manufacturer with care next time. If we'll > >> have to statically define the reset type for both the flashes, there's nothing > >> much we can do. Maybe if you have a gpio reset line connected to the flash you > >> can toggle that instead. > > > > Or we can specify the reset type in the device tree? That should neatly > > solve the problem I believe. > > > > It is surely an approach to consider. The downside with it is that people might > abuse it, and use it regardless if the reset type is defined in SFDP or not. > Do we care? I am not sure to be honest. Let's think through that once the problem actually comes up I suppose. -- Regards, Pratyush Yadav Texas Instruments Inc.