From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 2B8F7C433F5 for ; Fri, 18 Mar 2022 03:58:47 +0000 (UTC) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id B421583F87; Fri, 18 Mar 2022 04:56:25 +0100 (CET) Authentication-Results: phobos.denx.de; dmarc=none (p=none dis=none) header.from=sholland.org Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Authentication-Results: phobos.denx.de; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=sholland.org header.i=@sholland.org header.b="gVXaQnh4"; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=messagingengine.com header.i=@messagingengine.com header.b="CH86/V6D"; dkim-atps=neutral Received: by phobos.denx.de (Postfix, from userid 109) id AC5C783CEB; Fri, 18 Mar 2022 04:55:38 +0100 (CET) Received: from wout5-smtp.messagingengine.com (wout5-smtp.messagingengine.com [64.147.123.21]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id BE45783F62 for ; Fri, 18 Mar 2022 04:55:29 +0100 (CET) Authentication-Results: phobos.denx.de; dmarc=none (p=none dis=none) header.from=sholland.org Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=samuel@sholland.org Received: from compute3.internal (compute3.nyi.internal [10.202.2.43]) by mailout.west.internal (Postfix) with ESMTP id 9E6583201F4E; Thu, 17 Mar 2022 23:55:27 -0400 (EDT) Received: from mailfrontend2 ([10.202.2.163]) by compute3.internal (MEProxy); Thu, 17 Mar 2022 23:55:28 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=sholland.org; h= cc:cc:content-transfer-encoding:date:date:from:from:in-reply-to :in-reply-to:message-id:mime-version:references:reply-to:sender :subject:subject:to:to; s=fm2; bh=zs2MkAn2wOiL8/vLWh5EBw8Ci3jNnr 2cmJ4bbDqFrE8=; b=gVXaQnh4UajK6GZ2OmNdO8svMlurO3Aw4q1A6GBNcGHIm/ v/EkOE7PASb+xBchA4E9CW3AhHBEbkgaRBPJcJbjUtJZH4n6e7c67335poqvUZ0c SspiQz9hqchIYSXdkd8gE6AsNyJ7QSFEj+LS8JqPE6I4PlU6R0Z1ZIuIM1NV62JT nA65mcolKusI/mGpbNNwXqtQ8qfhLqR7ArI16K32h7F+oxArJ6oaniHId+RePtaz AGd6y+FrK5yvnnK8avbKafmDqa1J6h4DlQnPKV94d7NXvJ1E+DmdbmDemAlvxflP KsIUBZG4Exh1vifSvM9g59kQ1hzo291XR1L5uEDg== DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d= messagingengine.com; h=cc:cc:content-transfer-encoding:date:date :from:from:in-reply-to:in-reply-to:message-id:mime-version :references:reply-to:sender:subject:subject:to:to:x-me-proxy :x-me-proxy:x-me-sender:x-me-sender:x-sasl-enc; s=fm3; bh=zs2MkA n2wOiL8/vLWh5EBw8Ci3jNnr2cmJ4bbDqFrE8=; b=CH86/V6DePlw58+nFEifwQ VnjNz9nnqlD7k5y9RSc9VHthWBv7OPd3cDaxHCM22o8GV9/Q9eYtWCPbM95mMreK 6eUlqIkTbyyCIk1owIfIZdvqXQq+CsmgEBfRdN0lV+9ehD5hk9bS1BwlKJiljQQw pF67SWWm8oKNdhPguvbozPooQdnWff3rnxBs7Was/RAj+zaU5XZkxXPL5OAbCW8m bpy0UTlh6Q8wg8zpzQpkhntaJ/ga2/qLWtqsXZqStGdbl0E6HqfIEotRH9tOuzIy qF7y9JtPTV+VkCIkg02zceeXO/yg3AVj2G0XfszbHW+aCpAMtC68f/tm5H1oJc6g == X-ME-Sender: X-ME-Received: X-ME-Proxy-Cause: gggruggvucftvghtrhhoucdtuddrgedvvddrudefhedgieegucetufdoteggodetrfdotf fvucfrrhhofhhilhgvmecuhfgrshhtofgrihhlpdfqfgfvpdfurfetoffkrfgpnffqhgen uceurghilhhouhhtmecufedttdenucesvcftvggtihhpihgvnhhtshculddquddttddmne cujfgurhephffvufffkffojghfggfgsedtkeertdertddtnecuhfhrohhmpefurghmuhgv lhcujfholhhlrghnugcuoehsrghmuhgvlhesshhhohhllhgrnhgurdhorhhgqeenucggtf frrghtthgvrhhnpeduhfejfedvhffgfeehtefghfeiiefgfeehgfdvvdevfeegjeehjedv gfejheeuieenucevlhhushhtvghrufhiiigvpeefnecurfgrrhgrmhepmhgrihhlfhhroh hmpehsrghmuhgvlhesshhhohhllhgrnhgurdhorhhg X-ME-Proxy: Received: by mail.messagingengine.com (Postfix) with ESMTPA; Thu, 17 Mar 2022 23:55:26 -0400 (EDT) From: Samuel Holland To: u-boot@lists.denx.de, Jagan Teki , Andre Przywara Cc: Sean Anderson , Simon Glass , Heinrich Schuchardt , Samuel Holland , Heiko Schocher , Joe Hershberger Subject: [PATCH v2 23/23] spi: sun4i_spi: Remove non-DM pin setup Date: Thu, 17 Mar 2022 22:54:20 -0500 Message-Id: <20220318035420.15058-24-samuel@sholland.org> X-Mailer: git-send-email 2.33.1 In-Reply-To: <20220318035420.15058-1-samuel@sholland.org> References: <20220318035420.15058-1-samuel@sholland.org> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.5 at phobos.denx.de X-Virus-Status: Clean This is now handled automatically by the pinctrl driver. Signed-off-by: Samuel Holland --- (no changes since v1) drivers/spi/spi-sunxi.c | 84 ----------------------------------------- 1 file changed, 84 deletions(-) diff --git a/drivers/spi/spi-sunxi.c b/drivers/spi/spi-sunxi.c index d62355ec6f..b6cd7ddafa 100644 --- a/drivers/spi/spi-sunxi.c +++ b/drivers/spi/spi-sunxi.c @@ -32,7 +32,6 @@ #include #include -#include #include #include @@ -180,87 +179,6 @@ static void sun4i_spi_set_cs(struct udevice *bus, u8 cs, bool enable) writel(reg, SPI_REG(priv, SPI_TCR)); } -static int sun4i_spi_parse_pins(struct udevice *dev) -{ - const void *fdt = gd->fdt_blob; - const char *pin_name; - const fdt32_t *list; - u32 phandle; - int drive, pull = 0, pin, i; - int offset; - int size; - - list = fdt_getprop(fdt, dev_of_offset(dev), "pinctrl-0", &size); - if (!list) { - printf("WARNING: sun4i_spi: cannot find pinctrl-0 node\n"); - return -EINVAL; - } - - while (size) { - phandle = fdt32_to_cpu(*list++); - size -= sizeof(*list); - - offset = fdt_node_offset_by_phandle(fdt, phandle); - if (offset < 0) - return offset; - - drive = fdt_getprop_u32_default_node(fdt, offset, 0, - "drive-strength", 0); - if (drive) { - if (drive <= 10) - drive = 0; - else if (drive <= 20) - drive = 1; - else if (drive <= 30) - drive = 2; - else - drive = 3; - } else { - drive = fdt_getprop_u32_default_node(fdt, offset, 0, - "allwinner,drive", - 0); - drive = min(drive, 3); - } - - if (fdt_get_property(fdt, offset, "bias-disable", NULL)) - pull = 0; - else if (fdt_get_property(fdt, offset, "bias-pull-up", NULL)) - pull = 1; - else if (fdt_get_property(fdt, offset, "bias-pull-down", NULL)) - pull = 2; - else - pull = fdt_getprop_u32_default_node(fdt, offset, 0, - "allwinner,pull", - 0); - pull = min(pull, 2); - - for (i = 0; ; i++) { - pin_name = fdt_stringlist_get(fdt, offset, - "pins", i, NULL); - if (!pin_name) { - pin_name = fdt_stringlist_get(fdt, offset, - "allwinner,pins", - i, NULL); - if (!pin_name) - break; - } - - pin = sunxi_name_to_gpio(pin_name); - if (pin < 0) - break; - - if (IS_ENABLED(CONFIG_MACH_SUN50I) || - IS_ENABLED(CONFIG_SUN50I_GEN_H6)) - sunxi_gpio_set_cfgpin(pin, SUN50I_GPC_SPI0); - else - sunxi_gpio_set_cfgpin(pin, SUNXI_GPC_SPI0); - sunxi_gpio_set_drv(pin, drive); - sunxi_gpio_set_pull(pin, pull); - } - } - return 0; -} - static inline int sun4i_spi_set_clock(struct udevice *dev, bool enable) { struct sun4i_spi_priv *priv = dev_get_priv(dev); @@ -507,8 +425,6 @@ static int sun4i_spi_probe(struct udevice *bus) return ret; } - sun4i_spi_parse_pins(bus); - priv->variant = plat->variant; priv->base = plat->base; priv->freq = plat->max_hz; -- 2.33.1