From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id EC9C6C00144 for ; Mon, 1 Aug 2022 17:21:41 +0000 (UTC) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id 2E492844B5; Mon, 1 Aug 2022 19:21:32 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=fail (p=none dis=none) header.from=arm.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Received: by phobos.denx.de (Postfix, from userid 109) id E8BFB844B4; Mon, 1 Aug 2022 19:21:30 +0200 (CEST) Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by phobos.denx.de (Postfix) with ESMTP id 3CD7C844DE for ; Mon, 1 Aug 2022 19:21:28 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=arm.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=abdellatif.elkhlifi@arm.com Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 124D6139F; Mon, 1 Aug 2022 10:21:28 -0700 (PDT) Received: from e121910.arm.com (unknown [10.57.9.251]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 0EE373F67D; Mon, 1 Aug 2022 10:21:22 -0700 (PDT) From: Abdellatif El Khlifi To: ilias.apalodimas@linaro.org Cc: jens.wiklander@linaro.org, abdellatif.elkhlifi@arm.com, achin.gupta@arm.com, trini@konsulko.com, u-boot@lists.denx.de, vishnu.banavath@arm.com, xueliang.zhong@arm.com, nd@arm.com Subject: [PATCH v3 2/4] arm64: smccc: clear the Xn registers after SMC calls Date: Mon, 1 Aug 2022 18:20:51 +0100 Message-Id: <20220801172053.20163-3-abdellatif.elkhlifi@arm.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20220801172053.20163-1-abdellatif.elkhlifi@arm.com> References: <20220801172053.20163-1-abdellatif.elkhlifi@arm.com> X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.6 at phobos.denx.de X-Virus-Status: Clean set to zero the x0-x17 registers As per the SMCCC v1.2 spec, unused result and scratch registers can leak information after an SMC call. We can mitigate against this risk by returning zero in each register. Signed-off-by: Abdellatif El Khlifi Cc: Tom Rini Cc: Ilias Apalodimas Cc: Jens Wiklander --- arch/arm/cpu/armv8/smccc-call.S | 20 ++++++++++++++++++++ 1 file changed, 20 insertions(+) diff --git a/arch/arm/cpu/armv8/smccc-call.S b/arch/arm/cpu/armv8/smccc-call.S index ec6f299bc9..8ac3e461e4 100644 --- a/arch/arm/cpu/armv8/smccc-call.S +++ b/arch/arm/cpu/armv8/smccc-call.S @@ -84,6 +84,26 @@ ENDPROC(__arm_smccc_hvc) stp x14, x15, [x19, #ARM_SMCCC_1_2_REGS_X14_OFFS] stp x16, x17, [x19, #ARM_SMCCC_1_2_REGS_X16_OFFS] + /* x0-x17 registers can leak information after an SMC or HVC call. Let's clear them */ + mov x0, xzr + mov x1, xzr + mov x2, xzr + mov x3, xzr + mov x4, xzr + mov x5, xzr + mov x6, xzr + mov x7, xzr + mov x8, xzr + mov x9, xzr + mov x10, xzr + mov x11, xzr + mov x12, xzr + mov x13, xzr + mov x14, xzr + mov x15, xzr + mov x16, xzr + mov x17, xzr + /* Restore original x19 */ ldp xzr, x19, [sp], #16 ret -- 2.17.1