From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 95809C54EE9 for ; Wed, 7 Sep 2022 11:09:43 +0000 (UTC) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id 573728494A; Wed, 7 Sep 2022 13:09:37 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=foss.st.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Authentication-Results: phobos.denx.de; dkim=pass (2048-bit key; unprotected) header.d=foss.st.com header.i=@foss.st.com header.b="mtAwgLxW"; dkim-atps=neutral Received: by phobos.denx.de (Postfix, from userid 109) id 9D89484A49; Wed, 7 Sep 2022 11:20:11 +0200 (CEST) Received: from mx07-00178001.pphosted.com (mx08-00178001.pphosted.com [91.207.212.93]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id F3FB6848DC for ; Wed, 7 Sep 2022 11:20:08 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=foss.st.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=prvs=5249c53850=alain.volmat@foss.st.com Received: from pps.filterd (m0046661.ppops.net [127.0.0.1]) by mx07-00178001.pphosted.com (8.17.1.5/8.17.1.5) with ESMTP id 2879EQlO031642; Wed, 7 Sep 2022 11:20:07 +0200 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=foss.st.com; h=date : from : to : cc : subject : message-id : references : mime-version : content-type : in-reply-to; s=selector1; bh=Z4zrY6oUicmqw2ti6GbS2pKSONsH20X/ID4/9OIKCDM=; b=mtAwgLxWvRJzmnZM4B7mXonAQFl8tNfJDaSWSpj3+Ik3sVeF0w6xBFAopWuSajdXQCNW vw84rYA+pJpC6Nv2+fFFY7YVOBNveJEh2E4wpAzCrkkx0LTTzEIugMDRDpF7RtOFmTnn pUyc0yXcMGjNA975iWpR7yTujHOg1em4O7N0cm4kmUredFCVB1+qginxUmlodISHmLeA pFoPAi4uv07FLKjOWj8tCBSOmb1fbkKAEbPvNEmfsyi0Zhf0wJJAECkze5dhKmYrp7eG ChPnadamIKtJVXCTUHWdESnPXc2MdWSFhrReZaH6SQYwUh2TaWNWYVqJWfD3105vJRSB AA== Received: from beta.dmz-eu.st.com (beta.dmz-eu.st.com [164.129.1.35]) by mx07-00178001.pphosted.com (PPS) with ESMTPS id 3jergb01p7-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Wed, 07 Sep 2022 11:20:07 +0200 Received: from euls16034.sgp.st.com (euls16034.sgp.st.com [10.75.44.20]) by beta.dmz-eu.st.com (STMicroelectronics) with ESMTP id B502610002A; Wed, 7 Sep 2022 11:20:06 +0200 (CEST) Received: from Webmail-eu.st.com (shfdag1node1.st.com [10.75.129.69]) by euls16034.sgp.st.com (STMicroelectronics) with ESMTP id 9B5DD2194FF; Wed, 7 Sep 2022 11:20:06 +0200 (CEST) Received: from gnbcxd0016.gnb.st.com (10.75.127.45) by SHFDAG1NODE1.st.com (10.75.129.69) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256) id 15.1.2375.7; Wed, 7 Sep 2022 11:20:06 +0200 Date: Wed, 7 Sep 2022 11:20:00 +0200 From: Alain Volmat To: Patrice CHOTARD CC: Jorge Ramirez-Ortiz , , , , , Subject: Re: [PATCHv2 2/2] i2c: stm32f7: do not set the STOP condition on error Message-ID: <20220907092000.GA1713256@gnbcxd0016.gnb.st.com> References: <20220815145211.31342-1-jorge@foundries.io> <20220815145211.31342-2-jorge@foundries.io> <80f7f6f4-22bf-7ece-2a6e-0ae34c493cd9@foss.st.com> MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Disposition: inline In-Reply-To: <80f7f6f4-22bf-7ece-2a6e-0ae34c493cd9@foss.st.com> X-Disclaimer: ce message est personnel / this message is private X-Originating-IP: [10.75.127.45] X-ClientProxiedBy: SFHDAG2NODE3.st.com (10.75.127.6) To SHFDAG1NODE1.st.com (10.75.129.69) X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.205,Aquarius:18.0.895,Hydra:6.0.528,FMLib:17.11.122.1 definitions=2022-09-07_04,2022-09-06_02,2022-06-22_01 X-Mailman-Approved-At: Wed, 07 Sep 2022 13:09:27 +0200 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.6 at phobos.denx.de X-Virus-Status: Clean Hi, I confirm that a fix is necessary regarding this setting of the stop condition. As a matter of fact, the controller is already sending the stop condition in case of NACK so there is no need to send the stop condition. However, this fix is not enough since the nack could be detected few lines above if (status & (STM32_I2C_ISR_NACKF | STM32_I2C_ISR_ERRORS)) break; and in this case the current check would not catch it. I propose to set the STOP condition upon handling of the transfer complete. I've put this fix within a small 3 patches series that I'm going to send, could you check it to confirm this fixes the issue ? Regards, Alain On Thu, Aug 25, 2022 at 03:36:36PM +0200, Patrice CHOTARD wrote: > +Alain (with the correct email address ;-)) > > Alain, can you have a look a this patch and give your feedback on it. > > On my side i tested it on stm32mp157c-ev1 and stm32mp157c-dk2, i didn't see any regression > but i prefer to get expert feedback > > Thanks > Patrice > > On 8/15/22 16:52, Jorge Ramirez-Ortiz wrote: > > Sending the stop condition without waiting for transfer complete > > has been found to lock the bus (BUSY) when NACKF is raised. > > > > Tested accessing the NXP SE05X I2C device. > > https://www.nxp.com/docs/en/application-note/AN12399.pdf > > > > Signed-off-by: Jorge Ramirez-Ortiz > > Reviewed-by: Oleksandr Suvorov > > --- > > drivers/i2c/stm32f7_i2c.c | 8 +++++--- > > 1 file changed, 5 insertions(+), 3 deletions(-) > > > > diff --git a/drivers/i2c/stm32f7_i2c.c b/drivers/i2c/stm32f7_i2c.c > > index 3a727e68ac..14827e5cec 100644 > > --- a/drivers/i2c/stm32f7_i2c.c > > +++ b/drivers/i2c/stm32f7_i2c.c > > @@ -485,9 +485,11 @@ static int stm32_i2c_message_xfer(struct stm32_i2c_priv *i2c_priv, > > } > > } > > > > - /* End of transfer, send stop condition */ > > - mask = STM32_I2C_CR2_STOP; > > - setbits_le32(®s->cr2, mask); > > + if (!ret) { > > + /* End of transfer, send stop condition */ > > + mask = STM32_I2C_CR2_STOP; > > + setbits_le32(®s->cr2, mask); > > + } > > > > return stm32_i2c_check_end_of_message(i2c_priv); > > }