From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 93A58C77B61 for ; Thu, 13 Apr 2023 20:59:41 +0000 (UTC) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id 1F6F385E02; Thu, 13 Apr 2023 22:59:18 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=kernel.org Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Authentication-Results: phobos.denx.de; dkim=pass (2048-bit key; unprotected) header.d=kernel.org header.i=@kernel.org header.b="LywF6GK6"; dkim-atps=neutral Received: by phobos.denx.de (Postfix, from userid 109) id 3D94385ABA; Thu, 13 Apr 2023 22:58:59 +0200 (CEST) Received: from dfw.source.kernel.org (dfw.source.kernel.org [IPv6:2604:1380:4641:c500::1]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id C597D85DB6 for ; Thu, 13 Apr 2023 22:58:51 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=kernel.org Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=pali@kernel.org Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id A3DBA641B0; Thu, 13 Apr 2023 20:58:49 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id AACC7C4339B; Thu, 13 Apr 2023 20:58:48 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1681419528; bh=XU+YFJEd9iRrDT7/lWfSNwLDGpbm++zowCm5p9KH3Kk=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=LywF6GK6hj/ghV9urr2uKnedWKta13DJckiK4XBEmqByp+1TEqZ75fL8YV+C5SDgu bzoRi5IWkalqOPJgulZgj8bkbWsDZm1oXgZJmksNeQE31rSRCMmLAl3dsk0lNt19Ff rEoJ+3Oszg+vm1ESGwPWeZS6xiQ0Z0Uf/79p8yeW6cOwOg08ZllreRS6JA67pqc0Mk mFXN5+IrkySaeM+FfusjXmb+6XzZY1r9yh7xGbZ7CHNAJg8DgDA+pSB15jySWLY/sC oPMK4vL3UKI+6DtYJk7gZJWZ+4glVecfom087ZNgTPJoYddgKc69xwThMuVZy7fQYp ugqUULUPxdQGg== Received: by pali.im (Postfix) id A6954E10; Thu, 13 Apr 2023 22:58:46 +0200 (CEST) From: =?UTF-8?q?Pali=20Roh=C3=A1r?= To: Stefan Roese Cc: Martin Rowe , u-boot@lists.denx.de Subject: [PATCH v2 u-boot-mvebu 2/4] mmc: Read eMMC partition access bits before card reset Date: Thu, 13 Apr 2023 22:57:48 +0200 Message-Id: <20230413205750.10641-3-pali@kernel.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20230413205750.10641-1-pali@kernel.org> References: <20230413205750.10641-1-pali@kernel.org> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de X-Virus-Status: Clean eMMC specification in section "Access partitions" says that all reset events will restore the access bits in PARTITION_CONFIG CSD register to default User Data Area value (0b000). So read partition access bits from PARTITION_CONFIG CSD register before issuing card reset. This allows SPL/U-Boot to get information which eMMC partition was in use before SPL/U-Boot was booted. For some platforms this is the way how to determinate boot partition from which BootROM loaded SPL. Signed-off-by: Pali Rohár --- drivers/mmc/mmc.c | 31 ++++++++++++++++++++++++++++--- 1 file changed, 28 insertions(+), 3 deletions(-) diff --git a/drivers/mmc/mmc.c b/drivers/mmc/mmc.c index dde251c87bc7..771432de354d 100644 --- a/drivers/mmc/mmc.c +++ b/drivers/mmc/mmc.c @@ -2329,8 +2329,17 @@ static int mmc_startup_v4(struct mmc *mmc) /* store the partition info of emmc */ mmc->part_support = ext_csd[EXT_CSD_PARTITIONING_SUPPORT]; if ((ext_csd[EXT_CSD_PARTITIONING_SUPPORT] & PART_SUPPORT) || - ext_csd[EXT_CSD_BOOT_MULT]) - mmc->part_config = ext_csd[EXT_CSD_PART_CONF]; + ext_csd[EXT_CSD_BOOT_MULT]) { + /* + * At this stage PART_ACCESS_MASK bits in ext_csd[] are already cleared. + * But it is possible that they were already filled into mmc->part_config. + */ + if (mmc->part_config == MMCPART_NOAVAILABLE) + mmc->part_config = ext_csd[EXT_CSD_PART_CONF]; + else + mmc->part_config = (ext_csd[EXT_CSD_PART_CONF] & ~PART_ACCESS_MASK) | + (mmc->part_config & PART_ACCESS_MASK); + } if (part_completed && (ext_csd[EXT_CSD_PARTITIONING_SUPPORT] & ENHNCD_SUPPORT)) mmc->part_attr = ext_csd[EXT_CSD_PARTITIONS_ATTRIBUTE]; @@ -2600,7 +2609,6 @@ static int mmc_startup(struct mmc *mmc) #if CONFIG_IS_ENABLED(MMC_WRITE) mmc->erase_grp_size = 1; #endif - mmc->part_config = MMCPART_NOAVAILABLE; err = mmc_startup_v4(mmc); if (err) @@ -2848,9 +2856,26 @@ int mmc_get_op_cond(struct mmc *mmc, bool quiet) return err; mmc->ddr_mode = 0; + mmc->part_config = MMCPART_NOAVAILABLE; + retry: mmc_set_initial_state(mmc); + /* + * Read partition access bits from partition config register before card reset command + * because these bits are reset to default value (User Data Area) during card reset. + * This allows us to preserve original value of partition access bits used by the code + * which loaded us (for example BootROM) and use it for board specific boot purposes. + */ + if (mmc->part_config == MMCPART_NOAVAILABLE) { + ALLOC_CACHE_ALIGN_BUFFER(u8, ext_csd, MMC_MAX_BLOCK_LEN); + err = mmc_send_ext_csd(mmc, ext_csd); + if (err == 0 && + ((ext_csd[EXT_CSD_PARTITIONING_SUPPORT] & PART_SUPPORT) || + ext_csd[EXT_CSD_BOOT_MULT])) + mmc->part_config = ext_csd[EXT_CSD_PART_CONF] & PART_ACCESS_MASK; + } + /* Reset the Card */ err = mmc_go_idle(mmc); -- 2.20.1