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Wed, 29 Sep 2021 07:12:13 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=none (p=none dis=none) header.from=denx.de Authentication-Results: phobos.denx.de; spf=fail smtp.mailfrom=sr@denx.de Received: from smtp2.mailbox.org (smtp2.mailbox.org [80.241.60.241]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange ECDHE (P-384) server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) by mout-u-204.mailbox.org (Postfix) with ESMTPS id 4HK4Hd2JMBzQkJ4; Wed, 29 Sep 2021 07:12:13 +0200 (CEST) Subject: Re: [PATCH] arm: dts: armada8040: Fix CP0 eMMC/SDIO support To: Robert Marko , kostap@marvell.com, u-boot@lists.denx.de References: <20210927210326.2242447-1-robert.marko@sartura.hr> From: Stefan Roese Message-ID: <40aa4f11-7423-a785-fdc1-9a0e2f056e8c@denx.de> Date: Wed, 29 Sep 2021 07:12:09 +0200 MIME-Version: 1.0 In-Reply-To: <20210927210326.2242447-1-robert.marko@sartura.hr> Content-Type: text/plain; charset=utf-8; format=flowed Content-Language: de-DE Content-Transfer-Encoding: 8bit X-Rspamd-Queue-Id: 4B057183E X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.34 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.2 at phobos.denx.de X-Virus-Status: Clean On 27.09.21 23:03, Robert Marko wrote: > During the migration to a single DTSI for the CP110-s specific pinctrl > compatibles were moved to the SoC DTSI as CP0 and CP1 have some specifics. > Namely, CP0 eMMC/SDIO support depends on the mvebu-pinctrl driver setting > the BIT(0) in eMMC PHY IO Control 0 Register to 0 in order for the connect > the eMMC/SDIO PHY to the controller and not use it as a MPP pin multiplexor. > > So, the mvebu-pinctrl driver check specifically for the > "marvell,armada-8k-cpm-pinctrl" compatible to clear the that bit. > > Issue is that compatibles in the 8040 DTSI were set to "marvell,8k-cpm-pinctrl" > for CP0 and "marvell,8k-cps-pinctrl" for the CP1. > This is obviously incorrect as the pinctrl driver does not know about these. > > So fix the regression by applying correct compatibles to the DTSI. > Regression found and tested on the Puzzle M801 board. > > Fixes: a0ba97e5 ("arm: armada: dts: Use a single dtsi for cp110 die description") > Signed-off-by: Robert Marko Thanks for catching this: Reviewed-by: Stefan Roese Thanks, Stefan > --- > arch/arm/dts/armada-8040.dtsi | 4 ++-- > 1 file changed, 2 insertions(+), 2 deletions(-) > > diff --git a/arch/arm/dts/armada-8040.dtsi b/arch/arm/dts/armada-8040.dtsi > index 5123742b8d..eec5fa2774 100644 > --- a/arch/arm/dts/armada-8040.dtsi > +++ b/arch/arm/dts/armada-8040.dtsi > @@ -40,7 +40,7 @@ > }; > > &cp0_pinctl { > - compatible = "marvell,mvebu-pinctrl", "marvell,8k-cpm-pinctrl"; > + compatible = "marvell,mvebu-pinctrl", "marvell,armada-8k-cpm-pinctrl"; > bank-name ="cp0-110"; > > cp0_i2c0_pins: cp0-i2c-pins-0 { > @@ -75,7 +75,7 @@ > }; > > &cp1_pinctl { > - compatible = "marvell,mvebu-pinctrl", "marvell,8k-cps-pinctrl"; > + compatible = "marvell,mvebu-pinctrl", "marvell,armada-8k-cps-pinctrl"; > bank-name ="cp1-110"; > > cp1_ge1_rgmii_pins: cp1-ge-rgmii-pins-0 { > Viele Grüße, Stefan -- DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-51 Fax: (+49)-8142-66989-80 Email: sr@denx.de