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Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: BN8NAM11FT098.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: SA0PR12MB4367 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.6 at phobos.denx.de X-Virus-Status: Clean On 9/22/22 13:35, Simon Glass wrote: > Hi, > > On Thu, 22 Sept 2022 at 12:27, Michal Simek wrote: >> >> >> >> On 9/21/22 15:22, Alexander Dahl wrote: >>> For future DM based FPGA drivers and for now to have a meaningful >>> logging class for old FPGA drivers. >>> >>> Suggested-by: Michal Simek >>> Signed-off-by: Alexander Dahl >>> --- >>> include/dm/uclass-id.h | 1 + >>> 1 file changed, 1 insertion(+) >>> >>> diff --git a/include/dm/uclass-id.h b/include/dm/uclass-id.h >>> index a432e43871..c2b15881ba 100644 >>> --- a/include/dm/uclass-id.h >>> +++ b/include/dm/uclass-id.h >>> @@ -56,6 +56,7 @@ enum uclass_id { >>> UCLASS_ETH, /* Ethernet device */ >>> UCLASS_ETH_PHY, /* Ethernet PHY device */ >>> UCLASS_FIRMWARE, /* Firmware */ >>> + UCLASS_FPGA, /* FPGA device */ >>> UCLASS_FUZZING_ENGINE, /* Fuzzing engine */ >>> UCLASS_FS_FIRMWARE_LOADER, /* Generic loader */ >>> UCLASS_GPIO, /* Bank of general-purpose I/O pins */ >> >> Simon: the whole series look good to me. I am happy to take it via my tree when >> you ACK it. Also no problem if you want to take it via your tree. >> Please let me know which way you want to go. > > This is a good step forward but needs a lot more work. > > Please add a uclass file for the FPGA - i.e. > drivers/fpga/fpga-uclass.c - see other such files for examples. > > The FPGA uclass should have methods that match the non-DM interface. > You will likely need a DM_FPGA config to allow enabling the uclass. > > Also this needs a simple sandbox driver/emulator pair, so that it can > be tested, with tests in test/dm/fpga.c that use the driver. > > Admittedly this should have been done ages ago. I vaguely remember > mentioning it at the time, but perhaps I missed it. In any case, all > uclasses must have an API, implementation and tests that run in CI > with sandbox. Testing is a vital part of U-Boot and lack of testing is > the main reason why we went back to the 3-month release cycle. It can be done in steps for sure. Issues which Alex is addressing are there for quite some time and I think we shouldn't gate them by adding requirement to create the whole fpga uclass. It can be done on the top of this series. We know that it has to happen but I wouldn't push Alex to do it as condition for applying this series. From my perspective if he has time to do, let's start with it. If not it can be done later. Thanks, Michal