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[81.204.249.205]) by smtp.gmail.com with ESMTPSA id 17-20020a05600c021100b003ed2002fa6dsm5366995wmi.17.2023.03.13.05.15.35 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Mon, 13 Mar 2023 05:15:36 -0700 (PDT) Message-ID: <501445bc-6b0e-bf88-ced3-90a20fa22c4b@gmail.com> Date: Mon, 13 Mar 2023 13:15:34 +0100 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.6.0 Subject: Re: [PATCH v8 13/24] rockchip: rk3288: syscon_rk3288: store syscon platdata in regmap To: Simon Glass Cc: dario.binacchi@amarulasolutions.com, michael@amarulasolutions.com, philipp.tomsich@vrull.eu, kever.yang@rock-chips.com, u-boot@lists.denx.de, yifeng.zhao@rock-chips.com References: <6e68b95b-bf55-647d-df5e-cbbce20257f0@gmail.com> Content-Language: en-US From: Johan Jonker In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de X-Virus-Status: Clean On 3/13/23 04:10, Simon Glass wrote: > On Sun, 12 Mar 2023 at 18:31, Johan Jonker wrote: >> >> The Rockchip SoC rk3288 has 2 types of device trees floating around. >> A 64bit reg size when synced from Linux and a 32bit for U-boot. >> A pre-probe function in the syscon class driver assumes only 32bit. >> For other odd reg structures the regmap must be defined in the individual >> syscon driver. Store rk3288 platdata in a regmap before pre-probe >> during bind. >> >> Signed-off-by: Johan Jonker >> --- >> >> Note: >> Proof of concept not tested with rk3288 hardware, >> but with rk3066. >> >> Changed V7: >> new patch >> --- >> arch/arm/mach-rockchip/rk3288/syscon_rk3288.c | 121 ++++++++++++++++++ >> 1 file changed, 121 insertions(+) >> > > I tested this on chromebook_jerry which uses SPL_OF_PLATDATA > > Reviewed-by: Simon Glass > Tested-by: Simon Glass > > Can we sync up with Linux on the DT? Not right away. Given that this serie has version 8 and 24 patches. We start a new rk3288 sync serie for that. ;) Also must work on serie: Fixes for Rockchip NFC driver part 2 Johan === 1: Some boards with only SPL don't seem to fit with 64bit and should convert to TPL/SPL. arm: + popmetal-rk3288 +binman: Error 1 running 'mkimage -d ./mkimage.simple-bin.mkimage -n rk3288 -T rksd ./idbloader.img': Error: SPL image is too large (size 0x8800 than 0x8000) arm: + phycore-rk3288 +binman: Error 1 running 'mkimage -d ./mkimage.simple-bin.mkimage -n rk3288 -T rksd ./idbloader.img': Error: SPL image is too large (size 0x8800 than 0x8000) === 2: extra move/split of some nodes: rk3288.dtsi usbphy power-controller io-domains rk3288-u-boot.dtsi fix reg size gpio node order === 3: VOP/MIPI/LVDS/HDMI (TODO for Simon Glass) The Linux nodes have different/more clocks and edp has phy nodes. Some compatibles changes dp/edp/cdn-dp must be fixed for strstr() function. - compatible = "rockchip,rk3288-edp"; + compatible = "rockchip,rk3288-dp"; if (strstr(compat, "edp")) { vop_id = VOP_MODE_EDP; } else if (strstr(compat, "mipi")) { vop_id = VOP_MODE_MIPI; } else if (strstr(compat, "hdmi")) { vop_id = VOP_MODE_HDMI; } else if (strstr(compat, "cdn-dp")) { vop_id = VOP_MODE_DP; } else if (strstr(compat, "lvds")) { vop_id = VOP_MODE_LVDS; } else { debug("%s(%s): Failed to find vop mode for %s\n", __func__, dev_read_name(dev), compat); return -EINVAL; } === 4: Check if drivers still work after sync.(TODO for Simon Glass) This has to be done with someone that has rk3288 hardware. vopb: vop@ff930000 { compatible = "rockchip,rk3288-vop"; - reg = <0xff930000 0x19c>; + reg = <0x0 0xff930000 0x0 0x19c>, <0x0 0xff931000 0x0 0x1000>; interrupts = ; clocks = <&cru ACLK_VOP0>, <&cru DCLK_VOP0>, <&cru HCLK_VOP0>; clock-names = "aclk_vop", "dclk_vop", "hclk_vop"; @@ -862,31 +1032,31 @@ #address-cells = <1>; #size-cells = <0>; - vopb_out_edp: endpoint@0 { + vopb_out_hdmi: endpoint@0 { reg = <0>; - remote-endpoint = <&edp_in_vopb>; + remote-endpoint = <&hdmi_in_vopb>; }; - vopb_out_hdmi: endpoint@1 { + vopb_out_edp: endpoint@1 { reg = <1>; - remote-endpoint = <&hdmi_in_vopb>; + remote-endpoint = <&edp_in_vopb>; }; - vopb_out_lvds: endpoint@2 { + vopb_out_mipi: endpoint@2 { reg = <2>; - remote-endpoint = <&lvds_in_vopb>; + remote-endpoint = <&mipi_in_vopb>; }; - vopb_out_mipi: endpoint@3 { + vopb_out_lvds: endpoint@3 { reg = <3>; - remote-endpoint = <&mipi_in_vopb>; + remote-endpoint = <&lvds_in_vopb>; }; }; }; vopb_mmu: iommu@ff930300 { compatible = "rockchip,iommu"; - reg = <0xff930300 0x100>; + reg = <0x0 0xff930300 0x0 0x100>; interrupts = ; clocks = <&cru ACLK_VOP0>, <&cru HCLK_VOP0>; clock-names = "aclk", "iface"; @@ -897,7 +1067,7 @@ vopl: vop@ff940000 { compatible = "rockchip,rk3288-vop"; - reg = <0xff940000 0x19c>; + reg = <0x0 0xff940000 0x0 0x19c>, <0x0 0xff941000 0x0 0x1000>; interrupts = ; clocks = <&cru ACLK_VOP1>, <&cru DCLK_VOP1>, <&cru HCLK_VOP1>; clock-names = "aclk_vop", "dclk_vop", "hclk_vop"; @@ -911,31 +1081,31 @@ #address-cells = <1>; #size-cells = <0>; - vopl_out_edp: endpoint@0 { + vopl_out_hdmi: endpoint@0 { reg = <0>; - remote-endpoint = <&edp_in_vopl>; + remote-endpoint = <&hdmi_in_vopl>; }; - vopl_out_hdmi: endpoint@1 { + vopl_out_edp: endpoint@1 { reg = <1>; - remote-endpoint = <&hdmi_in_vopl>; + remote-endpoint = <&edp_in_vopl>; }; - vopl_out_lvds: endpoint@2 { + vopl_out_mipi: endpoint@2 { reg = <2>; - remote-endpoint = <&lvds_in_vopl>; + remote-endpoint = <&mipi_in_vopl>; }; - vopl_out_mipi: endpoint@3 { + vopl_out_lvds: endpoint@3 { reg = <3>; - remote-endpoint = <&mipi_in_vopl>; + remote-endpoint = <&lvds_in_vopl>; }; }; }; vopl_mmu: iommu@ff940300 { compatible = "rockchip,iommu"; - reg = <0xff940300 0x100>; + reg = <0x0 0xff940300 0x0 0x100>; interrupts = ; clocks = <&cru ACLK_VOP1>, <&cru HCLK_VOP1>; clock-names = "aclk", "iface"; @@ -945,11 +1115,11 @@ }; mipi_dsi: mipi@ff960000 { - compatible = "rockchip,rk3288_mipi_dsi"; - reg = <0xff960000 0x4000>; + compatible = "rockchip,rk3288-mipi-dsi", "snps,dw-mipi-dsi"; + reg = <0x0 0xff960000 0x0 0x4000>; interrupts = ; - clocks = <&cru PCLK_MIPI_DSI0>; - clock-names = "pclk_mipi"; + clocks = <&cru SCLK_MIPIDSI_24M>, <&cru PCLK_MIPI_DSI0>; + clock-names = "ref", "pclk"; power-domains = <&power RK3288_PD_VIO>; rockchip,grf = <&grf>; status = "disabled"; @@ -972,10 +1142,10 @@ lvds: lvds@ff96c000 { compatible = "rockchip,rk3288-lvds"; - reg = <0xff96c000 0x4000>; + reg = <0x0 0xff96c000 0x0 0x4000>; clocks = <&cru PCLK_LVDS_PHY>; clock-names = "pclk_lvds"; - pinctrl-names = "default"; + pinctrl-names = "lcdc"; pinctrl-0 = <&lcdc_ctl>; power-domains = <&power RK3288_PD_VIO>; rockchip,grf = <&grf>; @@ -1004,19 +1174,24 @@ }; edp: dp@ff970000 { - compatible = "rockchip,rk3288-edp"; - reg = <0xff970000 0x4000>; + compatible = "rockchip,rk3288-dp"; + reg = <0x0 0xff970000 0x0 0x4000>; interrupts = ; - clocks = <&cru SCLK_EDP>, <&cru SCLK_EDP_24M>, <&cru PCLK_EDP_CTRL>; - clock-names = "clk_edp", "clk_edp_24m", "pclk_edp"; + clocks = <&cru SCLK_EDP>, <&cru PCLK_EDP_CTRL>; + clock-names = "dp", "pclk"; + phys = <&edp_phy>; + phy-names = "dp"; + power-domains = <&power RK3288_PD_VIO>; resets = <&cru SRST_EDP>; - reset-names = "edp"; + reset-names = "dp"; rockchip,grf = <&grf>; - power-domains = <&power RK3288_PD_VIO>; status = "disabled"; ports { - edp_in: port { + #address-cells = <1>; + #size-cells = <0>; + edp_in: port@0 { + reg = <0>; #address-cells = <1>; #size-cells = <0>; edp_in_vopb: endpoint@0 { @@ -1033,13 +1208,13 @@ hdmi: hdmi@ff980000 { compatible = "rockchip,rk3288-dw-hdmi"; - reg = <0xff980000 0x20000>; + reg = <0x0 0xff980000 0x0 0x20000>; reg-io-width = <4>; #sound-dai-cells = <0>; rockchip,grf = <&grf>; interrupts = ; - clocks = <&cru PCLK_HDMI_CTRL>, <&cru SCLK_HDMI_HDCP>; - clock-names = "iahb", "isfr"; + clocks = <&cru PCLK_HDMI_CTRL>, <&cru SCLK_HDMI_HDCP>, <&cru SCLK_HDMI_CEC>; + clock-names = "iahb", "isfr", "cec"; power-domains = <&power RK3288_PD_VIO>; status = "disabled"; === 5: Update all defconfigs for rk3288. > > Regards, > Simon