From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id EBA13C433EF for ; Tue, 19 Jul 2022 05:24:54 +0000 (UTC) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id 8F7A184022; Tue, 19 Jul 2022 07:24:52 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=linaro.org Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Authentication-Results: phobos.denx.de; dkim=pass (2048-bit key; unprotected) header.d=linaro.org header.i=@linaro.org header.b="aBLA2yAr"; dkim-atps=neutral Received: by phobos.denx.de (Postfix, from userid 109) id 47C5D8402D; Tue, 19 Jul 2022 07:24:51 +0200 (CEST) Received: from mail-pl1-x630.google.com (mail-pl1-x630.google.com [IPv6:2607:f8b0:4864:20::630]) (using TLSv1.3 with cipher TLS_AES_128_GCM_SHA256 (128/128 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id D9D3F84019 for ; Tue, 19 Jul 2022 07:24:47 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=linaro.org Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=sumit.garg@linaro.org Received: by mail-pl1-x630.google.com with SMTP id z1so10976516plb.1 for ; Mon, 18 Jul 2022 22:24:47 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=mime-version:references:in-reply-to:from:date:message-id:subject:to :cc; bh=6Z1KlVY2kuDkOQkBVn26K1dFeGCau2ov+UDQIvqNM7U=; b=aBLA2yAr7su7Avy4yv0ywnE1ssZfj7vqHUTNrZDy3EiQG1oD/+Yjqy8eLrd2UTkOU7 FmlzH7hdfYZTwTIa+2unc48Uucxxaq3k9rFJjPzNMfar4zV9rUdhi8wWGweVLqfYE1bZ XxnqZ4KB6BMWLWJEym76qyCmBg36b9g4OCbJv9ZIhvNROwxhabFYmQ6FYUiOhD3899CQ 9s1SWmQc9CpwRgkicx+Tu38WXa2NbL0begvoLy8XqGuMVCRrQS47SIoh97rXbvMnUGIP MWrMYyIV6hYuf1ZxZ0k5drsJAJQiWHT+lIrXO4NYjkcGmppy3TO/Df/rfWB7DiS9OFUY W/AQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=6Z1KlVY2kuDkOQkBVn26K1dFeGCau2ov+UDQIvqNM7U=; b=VbAgzuRtGYort8pOZVSniJVMZhjJilQruAGOEEpaod/qOLJLUyKXagt8hL9VO9SOlH 5tcjVNBCcsfyS+02QuxbavGlGM0xv0KdiD0V8coZDyy+tHj3pfvEs71ZpfJYmFOSr1+t LtIGh4DpEsORy3v7TQq3OicLbZbHUJFc5KnOdxzuRM6NkvDGF4vEq8L3S/zATrOus6eo u+w5CWNr7ZSJwPW4aVvAelAyz5mFqasrfXkgosFWn/VoOI5MIelI50x98u7FgwxshirU 9G7bRjpbLuwuDHRFdIDtpkLWJn7c8z/gjx9SYVZ1X5r5qED1ZNDD2MdLiKzaRXKO7PnP iAlg== X-Gm-Message-State: AJIora8R0w/RZDjQtxd1/xZPstwYNOICmtI+IqqtCkM3xo5E/b2kI1gc mYbnFxj6RXOnEe6U1ERXVaMn0llGODG3E21Hs2cDYQ== X-Google-Smtp-Source: AGRyM1vNUlZfL2KJsyMVjNlWsRW9aAvBxHn2ojqa9eSdRvuhtCfVpy38ObzCfyPJU8XlcqczQ75bDIwm2bClGoYnlGY= X-Received: by 2002:a17:903:2450:b0:16c:1785:d814 with SMTP id l16-20020a170903245000b0016c1785d814mr31146638pls.20.1658208285992; Mon, 18 Jul 2022 22:24:45 -0700 (PDT) MIME-Version: 1.0 References: <20220714073337.2298978-1-sumit.garg@linaro.org> In-Reply-To: From: Sumit Garg Date: Tue, 19 Jul 2022 10:54:33 +0530 Message-ID: Subject: Re: [PATCH] arm: dts: qcom: Sync pinctrl DT nodes with Linux bindings To: Stephan Gerhold Cc: u-boot@lists.denx.de, robert.marko@sartura.hr, luka.kovacic@sartura.hr, luka.perkov@sartura.hr, rfried.dev@gmail.com, dsankouski@gmail.com, sjg@chromium.org, trini@konsulko.com, vinod.koul@linaro.org, nicolas.dechesne@linaro.org, mworsfold@impinj.com, daniel.thompson@linaro.org, pbrobinson@gmail.com, Alexey Minnekhanov Content-Type: text/plain; charset="UTF-8" X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.6 at phobos.denx.de X-Virus-Status: Clean On Sat, 16 Jul 2022 at 18:54, Stephan Gerhold wrote: > > On Fri, Jul 15, 2022 at 03:21:45PM +0530, Sumit Garg wrote: > > On Thu, 14 Jul 2022 at 23:45, Stephan Gerhold wrote: > > > On Thu, Jul 14, 2022 at 01:03:37PM +0530, Sumit Garg wrote: > > > > This is based on top of mine other patch-set [1]. Although, I have > > > > tested it on db845c and qcs404-evb but I would like other board > > > > maintainers to test it as well. > > > > > > > > [1] https://patchwork.ozlabs.org/project/uboot/list/?series=309135 > > > > > > If possible I would prefer to introduce the QCS404 platform with a clean > > > DT (i.e. qcs404.dtsi imported from the Linux kernel, instead of adding > > > the custom qcs404-evb.dts and then cleaning it up). This patch would > > > need to come before the QCS404 addition then. > > > > > > > Sorry but it's unfair to block new SoCs/boards support until all the > > existing mess around DT is cleaned up in Qcom specific u-boot drivers. > > This patch is a good example to demonstrate that all corresponding > > boards DT need to be fixed as well which requires testing. And I don't > > even have access to starqltechn, ipq4019 based board and db820c. > > > > Sorry, I thought this is the only patch you need to use the Linux QCS404 > DT as-is (maybe I misunderstood). I'm not expecting that you clean up > all existing boards first of course. :) I just thought it would be nice > to start clean for QCS404 immediately if this is the only patch you need. > > This patch looks simple enough for me if we test it on a couple of > boards, the pinctrl setup is fairly similar across all of them. However, > I wrote this before the comments with the additional "reg"s below. If we > need to add handling for that as well the patch will need to become a > bit larger of course, maybe too large to prepend it to your QCS404 > series. Yeah especially the test dependency makes it cumbersome to prepend it to QCS404 series. > > > AFAIK, it's not a requirement yet but a recommendation at this stage > > to import DT directly from Linux kernel and work with it. But I would > > be very happy to work in this direction to make Qcom SoCs/boards DT > > compliant. So I would request the merge of new boards support and then > > we can follow up with patches like this one. > > > > Thanks! I'm not familiar with the requirements so I'll leave this up to > Tom to decide. :) > > > [...] > > > > diff --git a/arch/arm/dts/qcs404-evb.dts b/arch/arm/dts/qcs404-evb.dts > > > > index 4f0ae20bdb..09687e1fd3 100644 > > > > --- a/arch/arm/dts/qcs404-evb.dts > > > > +++ b/arch/arm/dts/qcs404-evb.dts > > > > @@ -38,7 +38,7 @@ > > > > compatible = "simple-bus"; > > > > > > > > pinctrl_north@1300000 { > > > > - compatible = "qcom,tlmm-qcs404"; > > > > + compatible = "qcom,qcs404-pinctrl"; > > > > reg = <0x1300000 0x200000>; > > > > > > The Linux node still looks a bit different (from qcs404.dtsi): > > > > > > tlmm: pinctrl@1000000 { > > > compatible = "qcom,qcs404-pinctrl"; > > > reg = <0x01000000 0x200000>, > > > <0x01300000 0x200000>, > > > <0x07b00000 0x200000>; > > > reg-names = "south", "north", "east"; > > > > > > I guess we'll need to fetch the "north" region from it (if that's what > > > you need)? > > > > This is another example of a shortcut already used by the u-boot > > pinctrl driver (arch/arm/mach-snapdragon/pinctrl-snapdragon.c). You > > can find another user here (arch/arm/dts/sdm845.dtsi). So the pinctrl > > drivers need to be converted to a format supported by Linux kernel. > > Also, the pinctrl drivers need to be moved to "drivers/pinctrl/qcom/" > > dir instead. > > > > Right. FYI, there is started work on one possible solution for this > here: https://github.com/minlexx/u-boot-2nd/commits/660 > > Basically Alexey (now in Cc) and Michael ported parts of the Linux > pinctrl-msm driver to U-Boot, in a way that you can mostly just copy the > platform specific definitions as-is. The additional memory regions are > handled correctly there AFAICT. > > The code size overall is quite a bit higher of course, but I think this > is not a problem for any of the Qualcomm boards in U-Boot. The ease of > porting and flexibility should outweigh the cost here, I think. I had a brief look at this WIP patch-set but in general this should be the direction we should pursue longer term. Although I think the platform specific definitions could be limited to what's actually required for u-boot to function properly rather than adding redundant code. I think in a similar manner we need to generalize Qcom clock drivers as well (move from arch/arm/mach-snapdragon/clock-* -> drivers/clk/qcom/). I would be happy to review this patch-set once it's posted upstream and would be able to port platforms which I have access to using a generic pinctrl and clk framework. -Sumit > > Thanks, > Stephan