From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id BFE9BC76196 for ; Sat, 1 Apr 2023 18:49:19 +0000 (UTC) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id 7206C85C52; Sat, 1 Apr 2023 20:49:17 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Authentication-Results: phobos.denx.de; dkim=pass (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="bqZJxwNQ"; dkim-atps=neutral Received: by phobos.denx.de (Postfix, from userid 109) id 031DF85DD9; Sat, 1 Apr 2023 20:49:14 +0200 (CEST) Received: from mail-wr1-x429.google.com (mail-wr1-x429.google.com [IPv6:2a00:1450:4864:20::429]) (using TLSv1.3 with cipher TLS_AES_128_GCM_SHA256 (128/128 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id AC87E859B1 for ; Sat, 1 Apr 2023 20:49:07 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=rfried.dev@gmail.com Received: by mail-wr1-x429.google.com with SMTP id t4so20273273wra.7 for ; Sat, 01 Apr 2023 11:49:07 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; t=1680374947; h=content-transfer-encoding:cc:to:subject:message-id:date:from :in-reply-to:references:mime-version:from:to:cc:subject:date :message-id:reply-to; bh=XZVZTGpR7wSiNRfMKmUR+RQMrBHXL9UAvh+7BRBdReA=; b=bqZJxwNQeBvCckJor+d7zoePwvRYrRL5HHx0Igtz1hfzTQtJbU9cRO58yITKuNzyve wESq82O70j6oU69RxNkVlJ2CnWSd/p8kNhHxhkvCJtMN1JFUVMPQB4FK3uIxamDEhhRY SNMLqiRv0FPid3I4b6IDmb9zCsaf0/3zhaLLb79KRN/TZqC4FklUaHPyBk1dJH36yNMG S+jIgTsLb9I187eU/r0iBXllxoos4LpZnqZiDpeMiEeDPNMZaZajw+7mzO+0hfrSkAdD Rky9FkXtGQAf5RcR6Yeg4+q/w0ZvM7OwBeN6NnBVmyyuxZCxLJo3ulcD05ebUSudP7dz kiuQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; t=1680374947; h=content-transfer-encoding:cc:to:subject:message-id:date:from :in-reply-to:references:mime-version:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=XZVZTGpR7wSiNRfMKmUR+RQMrBHXL9UAvh+7BRBdReA=; b=4tpWPeLpLsREHiG0vljPwT0ejNK12IwbDcds8mebu0gYBp6u+fvp60pbcJ575LcUlJ sShozZc9tT0OSW3j1fELLbvIJFjvsLNbqaowMw+ckwx9SQS1kmZhhq2wHPbuNPQMTZWy bhJC/S08Ad+5WxLg2lBVGHupV08a6Y4ZpHzwbrTovrKM5XWBKaVAioIDmWMISbEpguDf XCR2GSaBIh+fAXgC+J10I5pmPW+t9eEy0awdNFo/cLN1SrnyV2yqcpcTsmGiYPGr823t 1VNp3ynrBsYyxJ4QRbrpQmyelh7weCGWHtJ/cQRCIl/9Os4F2m+u7LnUfvyuYIyN8dT3 /wBQ== X-Gm-Message-State: AAQBX9dlM0sLhDxe74rvd1zQvG4c91Nbf4kjYE6p2MZkjlVDDBA9WPaj 8q5eNptvNil0lJ2qUIQoVGXUcajiZWti5pzy0p0jsOI13EYW5g== X-Google-Smtp-Source: AKy350ZMMrtSjDL3oJYtR3mZatksXqq04wCD+o8CyO5a3AberJIvJRpz08BSvKmAFFSHU2WjCgD2nWQeSTRo4iCzulk= X-Received: by 2002:a05:6000:1c1b:b0:2d3:3a38:f370 with SMTP id ba27-20020a0560001c1b00b002d33a38f370mr4055617wrb.3.1680374947171; Sat, 01 Apr 2023 11:49:07 -0700 (PDT) MIME-Version: 1.0 References: <20230319170647.28149-1-marek.vasut+renesas@mailbox.org> <20230319170647.28149-3-marek.vasut+renesas@mailbox.org> In-Reply-To: <20230319170647.28149-3-marek.vasut+renesas@mailbox.org> From: Ramon Fried Date: Sat, 1 Apr 2023 21:48:55 +0300 Message-ID: Subject: Re: [PATCH 3/3] net: phy: Synchronize PHY interface modes with Linux To: Marek Vasut Cc: u-boot@lists.denx.de, "Ariel D'Alessandro" , =?UTF-8?B?TWFyZWsgQmVow7pu?= , Joe Hershberger , Stefan Roese , Tim Harvey , Vladimir Oltean Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de X-Virus-Status: Clean On Sun, Mar 19, 2023 at 7:07=E2=80=AFPM Marek Vasut wrote: > > Synchronize PHY interface modes with Linux next 6.2.y commit: > 0194b64578e90 ("net: phy: improve phy_read_poll_timeout") > > Retain LX2160A/LX2162A PHY modes as those are not yet supported > by the Linux kernel, but isolate those with ifdeffery. > > Isolate NCSI which are also not supported by Linux kernel. Note > that the ifdeffery cannot be avoided with IS_ENABLED() here due > to compilation of the entire conditional, which would fail in > case NCSI symbols are not available. > > Signed-off-by: Marek Vasut > --- > Cc: "Ariel D'Alessandro" > Cc: "Marek Beh=C3=BAn" > Cc: Joe Hershberger > Cc: Marek Vasut > Cc: Ramon Fried > Cc: Stefan Roese > Cc: Tim Harvey > Cc: Vladimir Oltean > --- > drivers/net/phy/phy.c | 4 +++ > include/phy_interface.h | 68 +++++++++++++++++++++++++++++------------ > 2 files changed, 53 insertions(+), 19 deletions(-) > > diff --git a/drivers/net/phy/phy.c b/drivers/net/phy/phy.c > index 9b0e497f223..f720d0a7920 100644 > --- a/drivers/net/phy/phy.c > +++ b/drivers/net/phy/phy.c > @@ -1160,7 +1160,11 @@ int phy_clear_bits_mmd(struct phy_device *phydev, = int devad, u32 regnum, u16 val > > bool phy_interface_is_ncsi(void) > { > +#ifdef CONFIG_PHY_NCSI > struct eth_pdata *pdata =3D dev_get_plat(eth_get_dev()); > > return pdata->phy_interface =3D=3D PHY_INTERFACE_MODE_NCSI; > +#else > + return 0; > +#endif > } > diff --git a/include/phy_interface.h b/include/phy_interface.h > index 52af7e612b6..31be3228c7c 100644 > --- a/include/phy_interface.h > +++ b/include/phy_interface.h > @@ -14,65 +14,95 @@ > > typedef enum { > PHY_INTERFACE_MODE_NA, /* don't touch */ > + PHY_INTERFACE_MODE_INTERNAL, > PHY_INTERFACE_MODE_MII, > PHY_INTERFACE_MODE_GMII, > PHY_INTERFACE_MODE_SGMII, > - PHY_INTERFACE_MODE_SGMII_2500, > - PHY_INTERFACE_MODE_QSGMII, > PHY_INTERFACE_MODE_TBI, > + PHY_INTERFACE_MODE_REVMII, > PHY_INTERFACE_MODE_RMII, > + PHY_INTERFACE_MODE_REVRMII, > PHY_INTERFACE_MODE_RGMII, > PHY_INTERFACE_MODE_RGMII_ID, > PHY_INTERFACE_MODE_RGMII_RXID, > PHY_INTERFACE_MODE_RGMII_TXID, > PHY_INTERFACE_MODE_RTBI, > + PHY_INTERFACE_MODE_SMII, > + PHY_INTERFACE_MODE_XGMII, > + PHY_INTERFACE_MODE_XLGMII, > + PHY_INTERFACE_MODE_MOCA, > + PHY_INTERFACE_MODE_QSGMII, > + PHY_INTERFACE_MODE_TRGMII, > + PHY_INTERFACE_MODE_100BASEX, > PHY_INTERFACE_MODE_1000BASEX, > PHY_INTERFACE_MODE_2500BASEX, > - PHY_INTERFACE_MODE_XGMII, > - PHY_INTERFACE_MODE_XAUI, > - PHY_INTERFACE_MODE_RXAUI, > PHY_INTERFACE_MODE_5GBASER, > - PHY_INTERFACE_MODE_SFI, > - PHY_INTERFACE_MODE_INTERNAL, > + PHY_INTERFACE_MODE_RXAUI, > + PHY_INTERFACE_MODE_XAUI, > + /* 10GBASE-R, XFI, SFI - single lane 10G Serdes */ > + PHY_INTERFACE_MODE_10GBASER, > + PHY_INTERFACE_MODE_25GBASER, > + PHY_INTERFACE_MODE_USXGMII, > + /* 10GBASE-KR - with Clause 73 AN */ > + PHY_INTERFACE_MODE_10GKR, > + PHY_INTERFACE_MODE_QUSGMII, > + PHY_INTERFACE_MODE_1000BASEKX, > +#if defined(CONFIG_ARCH_LX2160A) || defined(CONFIG_ARCH_LX2162A) > + /* LX2160A SERDES modes */ > PHY_INTERFACE_MODE_25G_AUI, > PHY_INTERFACE_MODE_XLAUI, > PHY_INTERFACE_MODE_CAUI2, > PHY_INTERFACE_MODE_CAUI4, > +#endif > +#if defined(CONFIG_PHY_NCSI) > PHY_INTERFACE_MODE_NCSI, > - PHY_INTERFACE_MODE_10GBASER, > - PHY_INTERFACE_MODE_USXGMII, > +#endif > PHY_INTERFACE_MODE_MAX, > } phy_interface_t; > > static const char * const phy_interface_strings[] =3D { > - [PHY_INTERFACE_MODE_NA] =3D "", > + [PHY_INTERFACE_MODE_NA] =3D "", > + [PHY_INTERFACE_MODE_INTERNAL] =3D "internal", > [PHY_INTERFACE_MODE_MII] =3D "mii", > [PHY_INTERFACE_MODE_GMII] =3D "gmii", > [PHY_INTERFACE_MODE_SGMII] =3D "sgmii", > - [PHY_INTERFACE_MODE_SGMII_2500] =3D "sgmii-2500", > - [PHY_INTERFACE_MODE_QSGMII] =3D "qsgmii", > [PHY_INTERFACE_MODE_TBI] =3D "tbi", > + [PHY_INTERFACE_MODE_REVMII] =3D "rev-mii", > [PHY_INTERFACE_MODE_RMII] =3D "rmii", > + [PHY_INTERFACE_MODE_REVRMII] =3D "rev-rmii", > [PHY_INTERFACE_MODE_RGMII] =3D "rgmii", > [PHY_INTERFACE_MODE_RGMII_ID] =3D "rgmii-id", > [PHY_INTERFACE_MODE_RGMII_RXID] =3D "rgmii-rxid", > [PHY_INTERFACE_MODE_RGMII_TXID] =3D "rgmii-txid", > [PHY_INTERFACE_MODE_RTBI] =3D "rtbi", > + [PHY_INTERFACE_MODE_SMII] =3D "smii", > + [PHY_INTERFACE_MODE_XGMII] =3D "xgmii", > + [PHY_INTERFACE_MODE_XLGMII] =3D "xlgmii", > + [PHY_INTERFACE_MODE_MOCA] =3D "moca", > + [PHY_INTERFACE_MODE_QSGMII] =3D "qsgmii", > + [PHY_INTERFACE_MODE_TRGMII] =3D "trgmii", > [PHY_INTERFACE_MODE_1000BASEX] =3D "1000base-x", > + [PHY_INTERFACE_MODE_1000BASEKX] =3D "1000base-kx", > [PHY_INTERFACE_MODE_2500BASEX] =3D "2500base-x", > - [PHY_INTERFACE_MODE_XGMII] =3D "xgmii", > - [PHY_INTERFACE_MODE_XAUI] =3D "xaui", > - [PHY_INTERFACE_MODE_RXAUI] =3D "rxaui", > [PHY_INTERFACE_MODE_5GBASER] =3D "5gbase-r", > - [PHY_INTERFACE_MODE_SFI] =3D "sfi", > - [PHY_INTERFACE_MODE_INTERNAL] =3D "internal", > + [PHY_INTERFACE_MODE_RXAUI] =3D "rxaui", > + [PHY_INTERFACE_MODE_XAUI] =3D "xaui", > + [PHY_INTERFACE_MODE_10GBASER] =3D "10gbase-r", > + [PHY_INTERFACE_MODE_25GBASER] =3D "25gbase-r", > + [PHY_INTERFACE_MODE_USXGMII] =3D "usxgmii", > + [PHY_INTERFACE_MODE_10GKR] =3D "10gbase-kr", > + [PHY_INTERFACE_MODE_100BASEX] =3D "100base-x", > + [PHY_INTERFACE_MODE_QUSGMII] =3D "qusgmii", > +#if defined(CONFIG_ARCH_LX2160A) || defined(CONFIG_ARCH_LX2162A) > + /* LX2160A SERDES modes */ > [PHY_INTERFACE_MODE_25G_AUI] =3D "25g-aui", > [PHY_INTERFACE_MODE_XLAUI] =3D "xlaui4", > [PHY_INTERFACE_MODE_CAUI2] =3D "caui2", > [PHY_INTERFACE_MODE_CAUI4] =3D "caui4", > +#endif > +#if defined(CONFIG_PHY_NCSI) > [PHY_INTERFACE_MODE_NCSI] =3D "NC-SI", > - [PHY_INTERFACE_MODE_10GBASER] =3D "10gbase-r", > - [PHY_INTERFACE_MODE_USXGMII] =3D "usxgmii", > +#endif > }; > > /* Backplane modes: > -- > 2.39.2 > Reviewed-by: Ramon Fried