From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 5860CECAAA1 for ; Tue, 6 Sep 2022 07:27:47 +0000 (UTC) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id 0506184A4A; Tue, 6 Sep 2022 09:27:45 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=linaro.org Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Authentication-Results: phobos.denx.de; dkim=pass (2048-bit key; unprotected) header.d=linaro.org header.i=@linaro.org header.b="onUUyKpc"; dkim-atps=neutral Received: by phobos.denx.de (Postfix, from userid 109) id 16BB984A58; Tue, 6 Sep 2022 09:27:43 +0200 (CEST) Received: from mail-oa1-x33.google.com (mail-oa1-x33.google.com [IPv6:2001:4860:4864:20::33]) (using TLSv1.3 with cipher TLS_AES_128_GCM_SHA256 (128/128 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id 3F472848F8 for ; Tue, 6 Sep 2022 09:27:40 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=linaro.org Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=etienne.carriere@linaro.org Received: by mail-oa1-x33.google.com with SMTP id 586e51a60fabf-1279948d93dso6368564fac.10 for ; Tue, 06 Sep 2022 00:27:40 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=cc:to:subject:message-id:date:from:in-reply-to:references :mime-version:from:to:cc:subject:date; bh=MsYMtUOLsE6aSG1sdn+993ojLxR2Xk6N5059wQ+OUp0=; b=onUUyKpc/9gHqMGHKKoOwqfSDgvKcI4p9EPCxG3pFaZYckOdckqJrGvFYKPBGL18zv 3kAm4F7gTjuVP1lsg0yHzvNUiXnnMBKoNOdZ6tlNuONDyx8j3D6Fh5JLi+GmMXZkRLaQ aHGTXIy/az6SEwOrFi45rTgZ6GZOcSsm8R1x5Xex42w87OGs7G3U9bQjMHhpZ61hWYHt 3c2Iu/bAzu5Am/vdV9SLh0DGfpchj6ak9h3NTQGO0l6LtMrDE6nzOca+f4UcP+h0G7ZN 86ckEbdHsAiOQ8U5xils7AKkcvGEgkhuUncLqy/1NIPP2aDibrWvWwsQZXOD+spPovVC wuVA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=cc:to:subject:message-id:date:from:in-reply-to:references :mime-version:x-gm-message-state:from:to:cc:subject:date; bh=MsYMtUOLsE6aSG1sdn+993ojLxR2Xk6N5059wQ+OUp0=; b=ZfJK3Sat4qm51GWk0cDAog/Mez+Cg8K23wc34y0PVn8z8ppcRhk2gwzzXBASdWWFkR xBzRhIEFgqgXwqxsAmWiMxRY3TE3ld/2Jk3Aoa6b0xlbG13r0l7P7bx2W3sQ49F7wWIB 6iswoKkDY8bVJTr6mOG6MykvAZocmL+8kOuF38SWEEjeY1/0uvoUD9vTg/tgSd2OgST+ //VwYQKpnDU6uDAxQnPXJJqhKDDRDFGC+K4M6uCchBsO3wpGHnUglcQhT7TnKr28IFsv e4wpnT8FvfR1wvhOW9KHRxBsCLya2d867h9+KywDyH7nDu8e2Op2JQhm/As7YlcXclg1 dlWg== X-Gm-Message-State: ACgBeo3Ar2BdD5LkYAnipe5Gim0zaF+20xRa585xOv9yDgMVQamgAjkJ sAn7/VnuEjWcp2n6c6omhYpdjP97Ppds3DqJZWkNdzSuTat8kA== X-Google-Smtp-Source: AA6agR76Y2GQCTyvRYtyp2q2fqMiMAWGEuHDRRqZHtV+JXJD5HOSP++XaM3AybVAPPcy7QBrXtd0Gpatx2YuSlcbOHg= X-Received: by 2002:a05:6870:8181:b0:127:806f:ab0b with SMTP id k1-20020a056870818100b00127806fab0bmr3341674oae.217.1662449258830; Tue, 06 Sep 2022 00:27:38 -0700 (PDT) MIME-Version: 1.0 References: <20220826095716.1676150-1-sughosh.ganu@linaro.org> <20220826095716.1676150-8-sughosh.ganu@linaro.org> In-Reply-To: <20220826095716.1676150-8-sughosh.ganu@linaro.org> From: Etienne Carriere Date: Tue, 6 Sep 2022 09:27:27 +0200 Message-ID: Subject: Re: [PATCH v9 07/15] FWU: STM32MP1: Add support to read boot index from backup register To: Sughosh Ganu Cc: u-boot@lists.denx.de, Heinrich Schuchardt , Ilias Apalodimas , Takahiro Akashi , Patrick Delaunay , Patrice Chotard , Simon Glass , Bin Meng , Tom Rini , Michal Simek , Jassi Brar Content-Type: text/plain; charset="UTF-8" X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.6 at phobos.denx.de X-Virus-Status: Clean Hi Sughosh, I have a last comment on this series, related to the below patch and patch "test: dm: Add test cases for FWU Metadata uclass". On Fri, 26 Aug 2022 at 11:58, Sughosh Ganu wrote: > > The FWU Multi Bank Update feature allows the platform to boot the > firmware images from one of the partitions(banks). The first stage > bootloader(fsbl) passes the value of the boot index, i.e. the bank > from which the firmware images were booted from to U-Boot. On the > STM32MP157C-DK2 board, this value is passed through one of the SoC's > backup register. Add a function to read the boot index value from the > backup register. > > Signed-off-by: Sughosh Ganu > Reviewed-by: Patrick Delaunay > Acked-by: Ilias Apalodimas > --- > Changes since V8: None > > arch/arm/mach-stm32mp/include/mach/stm32.h | 5 +++++ > board/st/stm32mp1/stm32mp1.c | 23 ++++++++++++++++++++++ > include/fwu.h | 12 +++++++++++ > 3 files changed, 40 insertions(+) > > diff --git a/arch/arm/mach-stm32mp/include/mach/stm32.h b/arch/arm/mach-stm32mp/include/mach/stm32.h > index c70375a723..c85ae6a34e 100644 > --- a/arch/arm/mach-stm32mp/include/mach/stm32.h > +++ b/arch/arm/mach-stm32mp/include/mach/stm32.h > @@ -112,11 +112,16 @@ enum boot_device { > #ifdef CONFIG_STM32MP15x > #define TAMP_BACKUP_MAGIC_NUMBER TAMP_BACKUP_REGISTER(4) > #define TAMP_BACKUP_BRANCH_ADDRESS TAMP_BACKUP_REGISTER(5) > +#define TAMP_FWU_BOOT_INFO_REG TAMP_BACKUP_REGISTER(10) > #define TAMP_COPRO_RSC_TBL_ADDRESS TAMP_BACKUP_REGISTER(17) > #define TAMP_COPRO_STATE TAMP_BACKUP_REGISTER(18) > #define TAMP_BOOT_CONTEXT TAMP_BACKUP_REGISTER(20) > #define TAMP_BOOTCOUNT TAMP_BACKUP_REGISTER(21) > > +#define TAMP_FWU_BOOT_IDX_MASK GENMASK(3, 0) > + > +#define TAMP_FWU_BOOT_IDX_OFFSET 0 > + > #define TAMP_COPRO_STATE_OFF 0 > #define TAMP_COPRO_STATE_INIT 1 > #define TAMP_COPRO_STATE_CRUN 2 > diff --git a/board/st/stm32mp1/stm32mp1.c b/board/st/stm32mp1/stm32mp1.c > index bfec0a710d..dd95babb49 100644 > --- a/board/st/stm32mp1/stm32mp1.c > +++ b/board/st/stm32mp1/stm32mp1.c > @@ -966,3 +966,26 @@ static void board_copro_image_process(ulong fw_image, size_t fw_size) > } > > U_BOOT_FIT_LOADABLE_HANDLER(IH_TYPE_COPRO, board_copro_image_process); > + > +#if defined(CONFIG_FWU_MULTI_BANK_UPDATE) > + > +#include > + > +/** > + * fwu_plat_get_bootidx() - Get the value of the boot index > + * @boot_idx: Boot index value > + * > + * Get the value of the bank(partition) from which the platform > + * has booted. This value is passed to U-Boot from the earlier > + * stage bootloader which loads and boots all the relevant > + * firmware images > + * > + */ > +void fwu_plat_get_bootidx(void *boot_idx) > +{ > + u32 *bootidx = boot_idx; > + > + *bootidx = (readl(TAMP_FWU_BOOT_INFO_REG) >> > + TAMP_FWU_BOOT_IDX_OFFSET) & TAMP_FWU_BOOT_IDX_MASK; > +} > +#endif /* CONFIG_FWU_MULTI_BANK_UPDATE */ > diff --git a/include/fwu.h b/include/fwu.h > index 7ebd3a7115..b8c207deaf 100644 > --- a/include/fwu.h > +++ b/include/fwu.h > @@ -240,4 +240,16 @@ int fwu_plat_get_alt_num(struct udevice *dev, efi_guid_t *image_guid, > * > */ > int fwu_plat_get_update_index(uint *update_idx); > + > +/** > + * fwu_plat_get_bootidx() - Get the value of the boot index > + * @boot_idx: Boot index value > + * > + * Get the value of the bank(partition) from which the platform > + * has booted. This value is passed to U-Boot from the earlier > + * stage bootloader which loads and boots all the relevant > + * firmware images > + * > + */ > +void fwu_plat_get_bootidx(void *boot_idx); It's maybe not clean to pass a void * to something callee shall write to. Could the reference be passed with an explicit type pointer as 'unsigned int *'? Best regards, Etienne > #endif /* _FWU_H_ */ > -- > 2.34.1 >