From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 76D8DC433F5 for ; Mon, 11 Oct 2021 20:18:01 +0000 (UTC) Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id E357F60F21 for ; Mon, 11 Oct 2021 20:18:00 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.4.1 mail.kernel.org E357F60F21 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=chromium.org Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=lists.denx.de Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id 32CC6832CF; Mon, 11 Oct 2021 22:17:59 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=chromium.org Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Authentication-Results: phobos.denx.de; dkim=pass (1024-bit key; unprotected) header.d=chromium.org header.i=@chromium.org header.b="AlB113Qz"; dkim-atps=neutral Received: by phobos.denx.de (Postfix, from userid 109) id A1E8283455; Mon, 11 Oct 2021 22:17:56 +0200 (CEST) Received: from mail-vk1-xa2e.google.com (mail-vk1-xa2e.google.com [IPv6:2607:f8b0:4864:20::a2e]) (using TLSv1.3 with cipher TLS_AES_128_GCM_SHA256 (128/128 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id A91ED832BE for ; Mon, 11 Oct 2021 22:17:53 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=chromium.org Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=sjg@google.com Received: by mail-vk1-xa2e.google.com with SMTP id o42so159734vkf.9 for ; Mon, 11 Oct 2021 13:17:53 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; h=mime-version:references:in-reply-to:from:date:message-id:subject:to :cc; bh=DqXJQavnXkgxQyVYGhHMznENpuLAkbtbZuSvattFhTk=; b=AlB113QzMsIuhVsXSGvyxbu5xOznBCRXxsJeURBVRvyLImVVIfaV+d8H5Q+e26X8w9 8ujdUMRnRvfmJuFzF0dnlacHgaQdeFGHPVCeTwkAS7OzfoxnAw67iYTdo1Gi7bsnMTW3 /3CcFrVTWHEwjddsjrpcwd8FpMWnbLKq3xQQ0= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=DqXJQavnXkgxQyVYGhHMznENpuLAkbtbZuSvattFhTk=; b=X3SFyISgoxb+aMZIeUsmTiDS5NVmKmVA2py1ukTsAbMEaot+M+u1td/tMUuKF2IE7F iFB1C3CtmkXOmLt1h8wv2OYXR3RhaWLcpfkr0BsMMimn838HCaeONHLGLdKwcatauhju ZFkJoyO+aV5Y9lx1fk7aB9hDP9kf6hGq6s0stNdJSkc0CA1NFRnof24Hp9vqdvLHbwba Z2lGiR0si6a3sdWGutpxuS9P1Lu+aPCtUen412mh3Ii31BVt+Dkh0HpQf7ymoeuhUyo0 A0EwYZoviSMFsgfj/PrSGSHY/onYRWqyzWv6i5Pt4EvjlIbNKtmSFMJpQEVrZWlvFmzz HDVg== X-Gm-Message-State: AOAM5323BypwqwrZ1jbWmEoqOPoKeK4jcmJuC6B3mW/hzAutTGl70yPg O9lQjlAmTHZUx2un7p8M7xEIWaK9LPe+HvOirU4pTg== X-Google-Smtp-Source: ABdhPJx8AmIky+crbvFIO/Wxk/p3quPkkXfSSiLWzv+Av6AAdjMjxbyWZBtdQ/GUipAdTnGgsvDDJZWQ3EOXw0WEQoQ= X-Received: by 2002:a1f:5c46:: with SMTP id q67mr20590700vkb.24.1633983472189; Mon, 11 Oct 2021 13:17:52 -0700 (PDT) MIME-Version: 1.0 References: <20210930071800.443059-1-ilias.apalodimas@linaro.org> In-Reply-To: <20210930071800.443059-1-ilias.apalodimas@linaro.org> From: Simon Glass Date: Mon, 11 Oct 2021 14:17:40 -0600 Message-ID: Subject: Re: [PATCH 1/3 v3] riscv: Remove OF_PRIOR_STAGE from RISC-V boards To: Ilias Apalodimas Cc: Tom Rini , Mark Kettenis , Bharat Gooty , Rayagonda Kokatanur , Rick Chen , Leo , Thomas Fitzsimmons , Bin Meng , =?UTF-8?B?TWFyZWsgQmVow7pu?= , Green Wan , Brad Kim , Heinrich Schuchardt , David Abdurachmanov , Dimitri John Ledkov , U-Boot Mailing List Content-Type: text/plain; charset="UTF-8" X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.34 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.2 at phobos.denx.de X-Virus-Status: Clean Hi Ilias, On Thu, 30 Sept 2021 at 01:18, Ilias Apalodimas wrote: > > At some point back in 2018 prior_stage_fdt_address and OF_PRIOR_STAGE got > introduced, in order to support a DTB handed over by an earlier stage boot > loader. However we have another option in the Kconfig (OF_BOARD) which has > identical semantics. > > On RISC-V some of the platforms pick up the DTB from a1 and copy it in their > private gd_t. Apart from that they copy it to prior_stage_fdt_address, if > the Kconfig option is selected, which is unnecessary. > > So let's switch the config option for those boards to OF_BOARD and define > the required board_fdt_blob_setup() for them. > > Signed-off-by: Ilias Apalodimas > Reviewed-by: Simon Glass > --- > Changes since v2: > - Adjusted board_fdt_blob_setup() for ax25-ae350 to cover OF_BOARD cases > Changes since v1: > - Remove the sifive unleashed/unmatched changes, since they'll be handled > arch/riscv/cpu/cpu.c | 3 --- > arch/riscv/cpu/start.S | 5 ----- > arch/riscv/dts/binman.dtsi | 6 +++--- > board/AndesTech/ax25-ae350/ax25-ae350.c | 7 ++++++- > board/emulation/qemu-riscv/qemu-riscv.c | 9 +++++++++ > configs/ae350_rv32_defconfig | 2 +- > configs/ae350_rv32_spl_defconfig | 2 +- > configs/ae350_rv64_defconfig | 2 +- > configs/ae350_rv64_spl_defconfig | 2 +- > configs/qemu-riscv32_defconfig | 2 +- > configs/qemu-riscv32_smode_defconfig | 2 +- > configs/qemu-riscv32_spl_defconfig | 2 +- > configs/qemu-riscv64_defconfig | 2 +- > configs/qemu-riscv64_smode_defconfig | 2 +- > configs/qemu-riscv64_spl_defconfig | 2 +- > dts/Kconfig | 2 +- > 16 files changed, 29 insertions(+), 23 deletions(-) > [..] > diff --git a/board/AndesTech/ax25-ae350/ax25-ae350.c b/board/AndesTech/ax25-ae350/ax25-ae350.c > index 81b0ee992372..6de91208258f 100644 > --- a/board/AndesTech/ax25-ae350/ax25-ae350.c > +++ b/board/AndesTech/ax25-ae350/ax25-ae350.c > @@ -21,7 +21,6 @@ > > DECLARE_GLOBAL_DATA_PTR; > > -extern phys_addr_t prior_stage_fdt_address; > /* > * Miscellaneous platform dependent initializations > */ > @@ -57,7 +56,13 @@ ulong board_flash_get_legacy(ulong base, int banknum, flash_info_t *info) > > void *board_fdt_blob_setup(void) > { > +#if CONFIG_IS_ENABLED(OF_BOARD) > + return (void *)gd->arch.firmware_fdt_addr; This cast produces a warning for me, with qemu-riscv32 > +#elif CONFIG_IS_ENABLED(OF_SEPARATE) > return (void *)CONFIG_SYS_FDT_BASE; > +#else > + return NULL; > +#endif > } Regards, Simon