u-boot.lists.denx.de archive mirror
 help / color / mirror / Atom feed
From: Patrice CHOTARD <patrice.chotard@foss.st.com>
To: Patrick Delaunay <patrick.delaunay@foss.st.com>, <u-boot@lists.denx.de>
Cc: Alexandru Gagniuc <mr.nuke.me@gmail.com>,
	Marek Vasut <marex@denx.de>, Heiko Schocher <hs@denx.de>,
	Ilias Apalodimas <ilias.apalodimas@linaro.org>,
	Jaehoon Chung <jh80.chung@samsung.com>,
	Jagan Teki <jagan@amarulasolutions.com>,
	Jean-Philippe ROMAIN <jean-philippe.romain@st.com>,
	Rick Chen <rick@andestech.com>, Simon Glass <sjg@chromium.org>,
	<uboot-stm32@st-md-mailman.stormreply.com>
Subject: Re: [PATCH 2/4] stm32mp15: remove configs dependency on CONFIG_TFABOOT
Date: Mon, 22 Nov 2021 09:09:22 +0100	[thread overview]
Message-ID: <e958957d-7207-4c40-831d-78d78fd0602f@foss.st.com> (raw)
In-Reply-To: <20211011075244.2.Iceb3be142ba855190aaab771d6922f41ffcaccc3@changeid>

Hi Patrick

On 10/11/21 9:52 AM, Patrick Delaunay wrote:
> Remove the dependency on CONFIG_TFABOOT in stm32mp Kconfig
> - always activate the ARCH config: CONFIG_ARCH_SUPPORT_PSCI
>   and CONFIG_CPU_V7_HAS_NONSEC
> - CONFIG_ARMV7_NONSEC is deactivated in trusted defconfig
> - the correct sysreset driver is activated in each defconfig:
>   CONFIG_SYSRESET_PSCI or SYSRESET_SYSCON
> 
> Reported-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
> Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
> ---
> 
>  arch/arm/mach-stm32mp/Kconfig                             | 8 ++------
>  configs/stm32mp15-icore-stm32mp1-ctouch2_defconfig        | 1 +
>  configs/stm32mp15-icore-stm32mp1-edimm2.2_defconfig       | 1 +
>  .../stm32mp15-microgea-stm32mp1-microdev2-of7_defconfig   | 1 +
>  configs/stm32mp15-microgea-stm32mp1-microdev2_defconfig   | 1 +
>  configs/stm32mp15_basic_defconfig                         | 1 +
>  configs/stm32mp15_defconfig                               | 3 +++
>  configs/stm32mp15_dhcom_basic_defconfig                   | 1 +
>  configs/stm32mp15_dhcor_basic_defconfig                   | 1 +
>  configs/stm32mp15_trusted_defconfig                       | 3 +++
>  10 files changed, 15 insertions(+), 6 deletions(-)
> 
> diff --git a/arch/arm/mach-stm32mp/Kconfig b/arch/arm/mach-stm32mp/Kconfig
> index 69d56c23e1..4ef0daeab2 100644
> --- a/arch/arm/mach-stm32mp/Kconfig
> +++ b/arch/arm/mach-stm32mp/Kconfig
> @@ -35,10 +35,9 @@ config ENV_SIZE
>  
>  config STM32MP15x
>  	bool "Support STMicroelectronics STM32MP15x Soc"
> -	select ARCH_SUPPORT_PSCI if !TFABOOT
> -	select ARM_SMCCC if TFABOOT
> +	select ARCH_SUPPORT_PSCI
>  	select CPU_V7A
> -	select CPU_V7_HAS_NONSEC if !TFABOOT
> +	select CPU_V7_HAS_NONSEC
>  	select CPU_V7_HAS_VIRT
>  	select OF_BOARD_SETUP
>  	select PINCTRL_STM32
> @@ -47,8 +46,6 @@ config STM32MP15x
>  	select STM32_SERIAL
>  	select SYS_ARCH_TIMER
>  	imply CMD_NVEDIT_INFO
> -	imply SYSRESET_PSCI if TFABOOT
> -	imply SYSRESET_SYSCON if !TFABOOT
>  	help
>  		support of STMicroelectronics SOC STM32MP15x family
>  		STM32MP157, STM32MP153 or STM32MP151
> @@ -153,7 +150,6 @@ config NR_DRAM_BANKS
>  
>  config DDR_CACHEABLE_SIZE
>  	hex "Size of the DDR marked cacheable in pre-reloc stage"
> -	default 0x10000000 if TFABOOT
>  	default 0x40000000
>  	help
>  		Define the size of the DDR marked as cacheable in U-Boot
> diff --git a/configs/stm32mp15-icore-stm32mp1-ctouch2_defconfig b/configs/stm32mp15-icore-stm32mp1-ctouch2_defconfig
> index 14bf6d1376..ecc5ec1ffe 100644
> --- a/configs/stm32mp15-icore-stm32mp1-ctouch2_defconfig
> +++ b/configs/stm32mp15-icore-stm32mp1-ctouch2_defconfig
> @@ -73,6 +73,7 @@ CONFIG_REMOTEPROC_STM32_COPRO=y
>  CONFIG_DM_RTC=y
>  CONFIG_RTC_STM32=y
>  CONFIG_SERIAL_RX_BUFFER=y
> +CONFIG_SYSRESET_SYSCON=y
>  CONFIG_WDT=y
>  CONFIG_WDT_STM32MP=y
>  CONFIG_LZO=y
> diff --git a/configs/stm32mp15-icore-stm32mp1-edimm2.2_defconfig b/configs/stm32mp15-icore-stm32mp1-edimm2.2_defconfig
> index 648ecbfc67..fc5b5f370b 100644
> --- a/configs/stm32mp15-icore-stm32mp1-edimm2.2_defconfig
> +++ b/configs/stm32mp15-icore-stm32mp1-edimm2.2_defconfig
> @@ -73,6 +73,7 @@ CONFIG_REMOTEPROC_STM32_COPRO=y
>  CONFIG_DM_RTC=y
>  CONFIG_RTC_STM32=y
>  CONFIG_SERIAL_RX_BUFFER=y
> +CONFIG_SYSRESET_SYSCON=y
>  CONFIG_WDT=y
>  CONFIG_WDT_STM32MP=y
>  CONFIG_LZO=y
> diff --git a/configs/stm32mp15-microgea-stm32mp1-microdev2-of7_defconfig b/configs/stm32mp15-microgea-stm32mp1-microdev2-of7_defconfig
> index f422ffbeda..4faa4e3ce4 100644
> --- a/configs/stm32mp15-microgea-stm32mp1-microdev2-of7_defconfig
> +++ b/configs/stm32mp15-microgea-stm32mp1-microdev2-of7_defconfig
> @@ -73,6 +73,7 @@ CONFIG_REMOTEPROC_STM32_COPRO=y
>  CONFIG_DM_RTC=y
>  CONFIG_RTC_STM32=y
>  CONFIG_SERIAL_RX_BUFFER=y
> +CONFIG_SYSRESET_SYSCON=y
>  CONFIG_WDT=y
>  CONFIG_WDT_STM32MP=y
>  CONFIG_LZO=y
> diff --git a/configs/stm32mp15-microgea-stm32mp1-microdev2_defconfig b/configs/stm32mp15-microgea-stm32mp1-microdev2_defconfig
> index 244d9ccf4e..bab81bfa92 100644
> --- a/configs/stm32mp15-microgea-stm32mp1-microdev2_defconfig
> +++ b/configs/stm32mp15-microgea-stm32mp1-microdev2_defconfig
> @@ -73,6 +73,7 @@ CONFIG_REMOTEPROC_STM32_COPRO=y
>  CONFIG_DM_RTC=y
>  CONFIG_RTC_STM32=y
>  CONFIG_SERIAL_RX_BUFFER=y
> +CONFIG_SYSRESET_SYSCON=y
>  CONFIG_WDT=y
>  CONFIG_WDT_STM32MP=y
>  CONFIG_LZO=y
> diff --git a/configs/stm32mp15_basic_defconfig b/configs/stm32mp15_basic_defconfig
> index 77ed82c99f..6b3c2d6150 100644
> --- a/configs/stm32mp15_basic_defconfig
> +++ b/configs/stm32mp15_basic_defconfig
> @@ -147,6 +147,7 @@ CONFIG_SPI=y
>  CONFIG_DM_SPI=y
>  CONFIG_STM32_QSPI=y
>  CONFIG_STM32_SPI=y
> +CONFIG_SYSRESET_SYSCON=y
>  CONFIG_USB=y
>  CONFIG_DM_USB_GADGET=y
>  CONFIG_USB_EHCI_HCD=y
> diff --git a/configs/stm32mp15_defconfig b/configs/stm32mp15_defconfig
> index 701b1510c5..9d97301075 100644
> --- a/configs/stm32mp15_defconfig
> +++ b/configs/stm32mp15_defconfig
> @@ -8,10 +8,12 @@ CONFIG_ENV_OFFSET=0x480000
>  CONFIG_ENV_SECT_SIZE=0x40000
>  CONFIG_DEFAULT_DEVICE_TREE="stm32mp157c-ev1"
>  CONFIG_TARGET_ST_STM32MP15x=y
> +CONFIG_DDR_CACHEABLE_SIZE=0x10000000
>  CONFIG_CMD_STM32KEY=y
>  CONFIG_CMD_STM32PROG=y
>  CONFIG_ENV_OFFSET_REDUND=0x4C0000
>  CONFIG_TYPEC_STUSB160X=y
> +# CONFIG_ARMV7_NONSEC is not set
>  CONFIG_DISTRO_DEFAULTS=y
>  CONFIG_SYS_LOAD_ADDR=0xc2000000
>  CONFIG_FIT=y
> @@ -126,6 +128,7 @@ CONFIG_SPI=y
>  CONFIG_DM_SPI=y
>  CONFIG_STM32_QSPI=y
>  CONFIG_STM32_SPI=y
> +CONFIG_SYSRESET_PSCI=y
>  CONFIG_TEE=y
>  CONFIG_OPTEE=y
>  # CONFIG_OPTEE_TA_AVB is not set
> diff --git a/configs/stm32mp15_dhcom_basic_defconfig b/configs/stm32mp15_dhcom_basic_defconfig
> index 5b85f6ad03..8da8f3fe2a 100644
> --- a/configs/stm32mp15_dhcom_basic_defconfig
> +++ b/configs/stm32mp15_dhcom_basic_defconfig
> @@ -129,6 +129,7 @@ CONFIG_SPI=y
>  CONFIG_DM_SPI=y
>  CONFIG_STM32_QSPI=y
>  CONFIG_STM32_SPI=y
> +CONFIG_SYSRESET_SYSCON=y
>  CONFIG_USB=y
>  CONFIG_DM_USB_GADGET=y
>  CONFIG_USB_EHCI_HCD=y
> diff --git a/configs/stm32mp15_dhcor_basic_defconfig b/configs/stm32mp15_dhcor_basic_defconfig
> index 37dd2754c0..4315c4be3c 100644
> --- a/configs/stm32mp15_dhcor_basic_defconfig
> +++ b/configs/stm32mp15_dhcor_basic_defconfig
> @@ -123,6 +123,7 @@ CONFIG_SPI=y
>  CONFIG_DM_SPI=y
>  CONFIG_STM32_QSPI=y
>  CONFIG_STM32_SPI=y
> +CONFIG_SYSRESET_SYSCON=y
>  CONFIG_USB=y
>  CONFIG_DM_USB_GADGET=y
>  CONFIG_USB_EHCI_HCD=y
> diff --git a/configs/stm32mp15_trusted_defconfig b/configs/stm32mp15_trusted_defconfig
> index b4ed090e3f..5e2ec49298 100644
> --- a/configs/stm32mp15_trusted_defconfig
> +++ b/configs/stm32mp15_trusted_defconfig
> @@ -9,10 +9,12 @@ CONFIG_ENV_SECT_SIZE=0x40000
>  CONFIG_DEFAULT_DEVICE_TREE="stm32mp157c-ev1"
>  CONFIG_STM32MP15x_STM32IMAGE=y
>  CONFIG_TARGET_ST_STM32MP15x=y
> +CONFIG_DDR_CACHEABLE_SIZE=0x10000000
>  CONFIG_CMD_STM32KEY=y
>  CONFIG_CMD_STM32PROG=y
>  CONFIG_ENV_OFFSET_REDUND=0x2C0000
>  CONFIG_TYPEC_STUSB160X=y
> +# CONFIG_ARMV7_NONSEC is not set
>  CONFIG_DISTRO_DEFAULTS=y
>  CONFIG_SYS_LOAD_ADDR=0xc2000000
>  CONFIG_FIT=y
> @@ -127,6 +129,7 @@ CONFIG_SPI=y
>  CONFIG_DM_SPI=y
>  CONFIG_STM32_QSPI=y
>  CONFIG_STM32_SPI=y
> +CONFIG_SYSRESET_PSCI=y
>  CONFIG_TEE=y
>  CONFIG_OPTEE=y
>  # CONFIG_OPTEE_TA_AVB is not set
> 
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Thanks
Patrice

  reply	other threads:[~2021-11-22  8:10 UTC|newest]

Thread overview: 9+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-10-11  7:52 [PATCH 1/4] arm: stm32mp: bsec: Update OTP shadow registers in SPL Patrick Delaunay
2021-10-11  7:52 ` [PATCH 2/4] stm32mp15: remove configs dependency on CONFIG_TFABOOT Patrick Delaunay
2021-11-22  8:09   ` Patrice CHOTARD [this message]
2021-11-22  9:32     ` Ilias Apalodimas
2021-10-11  7:52 ` [PATCH 3/4] stm32mp15: replace CONFIG_TFABOOT when it is possible Patrick Delaunay
2021-11-22  8:42   ` Patrice CHOTARD
2021-10-11  7:52 ` [PATCH 4/4] stm32mp15: tidy up #ifdefs in cpu.c Patrick Delaunay
2021-11-22  8:45   ` Patrice CHOTARD
2021-11-22  7:58 ` [PATCH 1/4] arm: stm32mp: bsec: Update OTP shadow registers in SPL Patrice CHOTARD

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=e958957d-7207-4c40-831d-78d78fd0602f@foss.st.com \
    --to=patrice.chotard@foss.st.com \
    --cc=hs@denx.de \
    --cc=ilias.apalodimas@linaro.org \
    --cc=jagan@amarulasolutions.com \
    --cc=jean-philippe.romain@st.com \
    --cc=jh80.chung@samsung.com \
    --cc=marex@denx.de \
    --cc=mr.nuke.me@gmail.com \
    --cc=patrick.delaunay@foss.st.com \
    --cc=rick@andestech.com \
    --cc=sjg@chromium.org \
    --cc=u-boot@lists.denx.de \
    --cc=uboot-stm32@st-md-mailman.stormreply.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).