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From: Joerg Roedel <joro@8bytes.org>
To: x86@kernel.org
Cc: Joerg Roedel <joro@8bytes.org>, Joerg Roedel <jroedel@suse.de>,
	hpa@zytor.com, Andy Lutomirski <luto@kernel.org>,
	Dave Hansen <dave.hansen@linux.intel.com>,
	Peter Zijlstra <peterz@infradead.org>,
	Jiri Slaby <jslaby@suse.cz>,
	Dan Williams <dan.j.williams@intel.com>,
	Tom Lendacky <thomas.lendacky@amd.com>,
	Juergen Gross <jgross@suse.com>,
	Kees Cook <keescook@chromium.org>,
	David Rientjes <rientjes@google.com>,
	Cfir Cohen <cfir@google.com>, Erdem Aktas <erdemaktas@google.com>,
	Masami Hiramatsu <mhiramat@kernel.org>,
	Mike Stunes <mstunes@vmware.com>,
	Sean Christopherson <sean.j.christopherson@intel.com>,
	Martin Radev <martin.b.radev@gmail.com>,
	linux-kernel@vger.kernel.org, kvm@vger.kernel.org,
	virtualization@lists.linux-foundation.org
Subject: [PATCH v4 43/75] x86/sev-es: Allocate and Map stacks for #VC handler
Date: Tue, 14 Jul 2020 14:08:45 +0200	[thread overview]
Message-ID: <20200714120917.11253-44-joro@8bytes.org> (raw)
In-Reply-To: <20200714120917.11253-1-joro@8bytes.org>

From: Joerg Roedel <jroedel@suse.de>

Allocate and map an IST stack and a fall-back stack for the #VC handler.
The memory for the stacks is allocated only when SEV-ES is active.

The #VC handler needs to use an IST stack because it could be raised
from kernel space with unsafe stack, e.g. in the SYSCALL entry path.

Since the #VC exception can be nested, the #VC handler switches back to
the interrupted stack when entered from kernel space. If switching back
is not possible the fall-back stack will be used.

Signed-off-by: Joerg Roedel <jroedel@suse.de>
---
 arch/x86/include/asm/cpu_entry_area.h | 33 +++++++++++++++++----------
 arch/x86/kernel/dumpstack_64.c        |  8 +++++--
 arch/x86/kernel/sev-es.c              | 33 +++++++++++++++++++++++++++
 3 files changed, 60 insertions(+), 14 deletions(-)

diff --git a/arch/x86/include/asm/cpu_entry_area.h b/arch/x86/include/asm/cpu_entry_area.h
index 8902fdb7de13..f87e4c0c16f4 100644
--- a/arch/x86/include/asm/cpu_entry_area.h
+++ b/arch/x86/include/asm/cpu_entry_area.h
@@ -11,25 +11,29 @@
 #ifdef CONFIG_X86_64
 
 /* Macro to enforce the same ordering and stack sizes */
-#define ESTACKS_MEMBERS(guardsize)		\
-	char	DF_stack_guard[guardsize];	\
-	char	DF_stack[EXCEPTION_STKSZ];	\
-	char	NMI_stack_guard[guardsize];	\
-	char	NMI_stack[EXCEPTION_STKSZ];	\
-	char	DB_stack_guard[guardsize];	\
-	char	DB_stack[EXCEPTION_STKSZ];	\
-	char	MCE_stack_guard[guardsize];	\
-	char	MCE_stack[EXCEPTION_STKSZ];	\
-	char	IST_top_guard[guardsize];	\
+#define ESTACKS_MEMBERS(guardsize, optional_stack_size)		\
+	char	DF_stack_guard[guardsize];			\
+	char	DF_stack[EXCEPTION_STKSZ];			\
+	char	NMI_stack_guard[guardsize];			\
+	char	NMI_stack[EXCEPTION_STKSZ];			\
+	char	DB_stack_guard[guardsize];			\
+	char	DB_stack[EXCEPTION_STKSZ];			\
+	char	MCE_stack_guard[guardsize];			\
+	char	MCE_stack[EXCEPTION_STKSZ];			\
+	char	VC_stack_guard[guardsize];			\
+	char	VC_stack[optional_stack_size];			\
+	char	VC2_stack_guard[guardsize];			\
+	char	VC2_stack[optional_stack_size];			\
+	char	IST_top_guard[guardsize];			\
 
 /* The exception stacks' physical storage. No guard pages required */
 struct exception_stacks {
-	ESTACKS_MEMBERS(0)
+	ESTACKS_MEMBERS(0, 0)
 };
 
 /* The effective cpu entry area mapping with guard pages. */
 struct cea_exception_stacks {
-	ESTACKS_MEMBERS(PAGE_SIZE)
+	ESTACKS_MEMBERS(PAGE_SIZE, EXCEPTION_STKSZ)
 };
 
 /*
@@ -40,6 +44,8 @@ enum exception_stack_ordering {
 	ESTACK_NMI,
 	ESTACK_DB,
 	ESTACK_MCE,
+	ESTACK_VC,
+	ESTACK_VC2,
 	N_EXCEPTION_STACKS
 };
 
@@ -139,4 +145,7 @@ static inline struct entry_stack *cpu_entry_stack(int cpu)
 #define __this_cpu_ist_top_va(name)					\
 	CEA_ESTACK_TOP(__this_cpu_read(cea_exception_stacks), name)
 
+#define __this_cpu_ist_bot_va(name)					\
+	CEA_ESTACK_BOT(__this_cpu_read(cea_exception_stacks), name)
+
 #endif
diff --git a/arch/x86/kernel/dumpstack_64.c b/arch/x86/kernel/dumpstack_64.c
index 4a94d38cd141..c49cf594714b 100644
--- a/arch/x86/kernel/dumpstack_64.c
+++ b/arch/x86/kernel/dumpstack_64.c
@@ -24,11 +24,13 @@ static const char * const exception_stack_names[] = {
 		[ ESTACK_NMI	]	= "NMI",
 		[ ESTACK_DB	]	= "#DB",
 		[ ESTACK_MCE	]	= "#MC",
+		[ ESTACK_VC	]	= "#VC",
+		[ ESTACK_VC2	]	= "#VC2",
 };
 
 const char *stack_type_name(enum stack_type type)
 {
-	BUILD_BUG_ON(N_EXCEPTION_STACKS != 4);
+	BUILD_BUG_ON(N_EXCEPTION_STACKS != 6);
 
 	if (type == STACK_TYPE_IRQ)
 		return "IRQ";
@@ -79,6 +81,8 @@ struct estack_pages estack_pages[CEA_ESTACK_PAGES] ____cacheline_aligned = {
 	EPAGERANGE(NMI),
 	EPAGERANGE(DB),
 	EPAGERANGE(MCE),
+	EPAGERANGE(VC),
+	EPAGERANGE(VC2),
 };
 
 static bool in_exception_stack(unsigned long *stack, struct stack_info *info)
@@ -88,7 +92,7 @@ static bool in_exception_stack(unsigned long *stack, struct stack_info *info)
 	struct pt_regs *regs;
 	unsigned int k;
 
-	BUILD_BUG_ON(N_EXCEPTION_STACKS != 4);
+	BUILD_BUG_ON(N_EXCEPTION_STACKS != 6);
 
 	begin = (unsigned long)__this_cpu_read(cea_exception_stacks);
 	/*
diff --git a/arch/x86/kernel/sev-es.c b/arch/x86/kernel/sev-es.c
index 734afaee378d..64002d86a237 100644
--- a/arch/x86/kernel/sev-es.c
+++ b/arch/x86/kernel/sev-es.c
@@ -17,6 +17,7 @@
 #include <linux/kernel.h>
 #include <linux/mm.h>
 
+#include <asm/cpu_entry_area.h>
 #include <asm/sev-es.h>
 #include <asm/insn-eval.h>
 #include <asm/fpu/internal.h>
@@ -37,10 +38,41 @@ static struct ghcb __initdata *boot_ghcb;
 /* #VC handler runtime per-cpu data */
 struct sev_es_runtime_data {
 	struct ghcb ghcb_page;
+
+	/* Physical storage for the per-cpu IST stack of the #VC handler */
+	char ist_stack[EXCEPTION_STKSZ] __aligned(PAGE_SIZE);
+
+	/*
+	 * Physical storage for the per-cpu fall-back stack of the #VC handler.
+	 * The fall-back stack is used when it is not safe to switch back to the
+	 * interrupted stack in the #VC entry code.
+	 */
+	char fallback_stack[EXCEPTION_STKSZ] __aligned(PAGE_SIZE);
 };
 
 static DEFINE_PER_CPU(struct sev_es_runtime_data*, runtime_data);
 
+static void __init sev_es_setup_vc_stacks(int cpu)
+{
+	struct sev_es_runtime_data *data;
+	struct cpu_entry_area *cea;
+	unsigned long vaddr;
+	phys_addr_t pa;
+
+	data = per_cpu(runtime_data, cpu);
+	cea  = get_cpu_entry_area(cpu);
+
+	/* Map #VC IST stack */
+	vaddr = CEA_ESTACK_BOT(&cea->estacks, VC);
+	pa    = __pa(data->ist_stack);
+	cea_set_pte((void *)vaddr, pa, PAGE_KERNEL);
+
+	/* Map VC fall-back stack */
+	vaddr = CEA_ESTACK_BOT(&cea->estacks, VC2);
+	pa    = __pa(data->fallback_stack);
+	cea_set_pte((void *)vaddr, pa, PAGE_KERNEL);
+}
+
 /* Needed in vc_early_forward_exception */
 void do_early_exception(struct pt_regs *regs, int trapnr);
 
@@ -249,6 +281,7 @@ void __init sev_es_init_vc_handling(void)
 	for_each_possible_cpu(cpu) {
 		sev_es_alloc_runtime_data(cpu);
 		sev_es_init_ghcb(cpu);
+		sev_es_setup_vc_stacks(cpu);
 	}
 }
 
-- 
2.27.0

  parent reply	other threads:[~2020-07-14 12:08 UTC|newest]

Thread overview: 118+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-07-14 12:08 [PATCH v4 00/75] x86: SEV-ES Guest Support Joerg Roedel
2020-07-14 12:08 ` [PATCH v4 01/75] KVM: SVM: Add GHCB definitions Joerg Roedel
2020-07-14 12:08 ` [PATCH v4 02/75] KVM: SVM: Add GHCB Accessor functions Joerg Roedel
2020-07-14 12:08 ` [PATCH v4 03/75] KVM: SVM: Use __packed shorthand Joerg Roedel
2020-07-14 12:08 ` [PATCH v4 04/75] x86/cpufeatures: Add SEV-ES CPU feature Joerg Roedel
2020-07-14 12:08 ` [PATCH v4 05/75] x86/traps: Move pf error codes to <asm/trap_pf.h> Joerg Roedel
2020-07-14 12:08 ` [PATCH v4 06/75] x86/insn: Make inat-tables.c suitable for pre-decompression code Joerg Roedel
2020-07-17 13:58   ` Masami Hiramatsu
2020-07-14 12:08 ` [PATCH v4 07/75] x86/umip: Factor out instruction fetch Joerg Roedel
2020-07-14 12:08 ` [PATCH v4 08/75] x86/umip: Factor out instruction decoding Joerg Roedel
2020-07-14 12:08 ` [PATCH v4 09/75] x86/insn: Add insn_get_modrm_reg_off() Joerg Roedel
2020-07-14 12:08 ` [PATCH v4 10/75] x86/insn: Add insn_has_rep_prefix() helper Joerg Roedel
2020-07-17 14:06   ` Masami Hiramatsu
2020-07-14 12:08 ` [PATCH v4 11/75] x86/boot/compressed/64: Disable red-zone usage Joerg Roedel
2020-07-14 12:08 ` [PATCH v4 12/75] x86/boot/compressed/64: Add IDT Infrastructure Joerg Roedel
2020-07-14 12:08 ` [PATCH v4 13/75] x86/boot/compressed/64: Rename kaslr_64.c to ident_map_64.c Joerg Roedel
2020-07-15  1:23   ` Kees Cook
2020-07-14 12:08 ` [PATCH v4 14/75] x86/boot/compressed/64: Add page-fault handler Joerg Roedel
2020-07-15  1:24   ` Kees Cook
2020-07-14 12:08 ` [PATCH v4 15/75] x86/boot/compressed/64: Always switch to own page-table Joerg Roedel
2020-07-15  1:23   ` Kees Cook
2020-07-14 12:08 ` [PATCH v4 16/75] x86/boot/compressed/64: Don't pre-map memory in KASLR code Joerg Roedel
2020-07-15  1:24   ` Kees Cook
2020-07-14 12:08 ` [PATCH v4 17/75] x86/boot/compressed/64: Change add_identity_map() to take start and end Joerg Roedel
2020-07-15  1:24   ` Kees Cook
2020-07-14 12:08 ` [PATCH v4 18/75] x86/boot/compressed/64: Add stage1 #VC handler Joerg Roedel
2020-07-14 12:08 ` [PATCH v4 19/75] x86/boot/compressed/64: Call set_sev_encryption_mask earlier Joerg Roedel
2020-07-14 12:08 ` [PATCH v4 20/75] x86/boot/compressed/64: Check return value of kernel_ident_mapping_init() Joerg Roedel
2020-07-14 12:08 ` [PATCH v4 21/75] x86/boot/compressed/64: Add set_page_en/decrypted() helpers Joerg Roedel
2020-07-14 12:08 ` [PATCH v4 22/75] x86/boot/compressed/64: Setup GHCB Based VC Exception handler Joerg Roedel
2020-07-14 12:08 ` [PATCH v4 23/75] x86/boot/compressed/64: Unmap GHCB page before booting the kernel Joerg Roedel
2020-07-14 12:08 ` [PATCH v4 24/75] x86/sev-es: Add support for handling IOIO exceptions Joerg Roedel
2020-07-14 12:08 ` [PATCH v4 25/75] x86/fpu: Move xgetbv()/xsetbv() into separate header Joerg Roedel
2020-07-14 12:08 ` [PATCH v4 26/75] x86/sev-es: Add CPUID handling to #VC handler Joerg Roedel
2020-07-14 12:08 ` [PATCH v4 27/75] x86/idt: Move IDT to data segment Joerg Roedel
2020-07-15  1:25   ` Kees Cook
2020-07-14 12:08 ` [PATCH v4 28/75] x86/idt: Split idt_data setup out of set_intr_gate() Joerg Roedel
2020-07-15  1:26   ` Kees Cook
2020-07-14 12:08 ` [PATCH v4 29/75] x86/idt: Move two function from k/idt.c to i/a/desc.h Joerg Roedel
2020-07-15  1:29   ` Kees Cook
2020-07-14 12:08 ` [PATCH v4 30/75] x86/head/64: Install boot GDT Joerg Roedel
2020-07-14 12:08 ` [PATCH v4 31/75] x86/head/64: Reload GDT after switch to virtual addresses Joerg Roedel
2020-07-14 12:08 ` [PATCH v4 32/75] x86/head/64: Load segment registers earlier Joerg Roedel
2020-07-14 12:08 ` [PATCH v4 33/75] x86/head/64: Switch to initial stack earlier Joerg Roedel
2020-07-14 12:08 ` [PATCH v4 34/75] x86/head/64: Build k/head64.c with -fno-stack-protector Joerg Roedel
2020-07-15  1:34   ` Kees Cook
2020-07-15 16:34     ` Joerg Roedel
2020-07-14 12:08 ` [PATCH v4 35/75] x86/head/64: Load IDT earlier Joerg Roedel
2020-07-14 12:08 ` [PATCH v4 36/75] x86/head/64: Move early exception dispatch to C code Joerg Roedel
2020-07-14 12:08 ` [PATCH v4 37/75] x86/sev-es: Add SEV-ES Feature Detection Joerg Roedel
2020-07-14 12:08 ` [PATCH v4 38/75] x86/sev-es: Print SEV-ES info into kernel log Joerg Roedel
2020-07-14 12:08 ` [PATCH v4 39/75] x86/sev-es: Compile early handler code into kernel image Joerg Roedel
2020-07-14 12:08 ` [PATCH v4 40/75] x86/sev-es: Setup early #VC handler Joerg Roedel
2020-07-14 12:08 ` [PATCH v4 41/75] x86/sev-es: Setup GHCB based boot " Joerg Roedel
2020-07-14 12:08 ` [PATCH v4 42/75] x86/sev-es: Setup per-cpu GHCBs for the runtime handler Joerg Roedel
2020-07-14 12:08 ` Joerg Roedel [this message]
2020-07-14 12:08 ` [PATCH v4 44/75] x86/sev-es: Allocate and setup IST entry for #VC Joerg Roedel
2020-07-14 12:08 ` [PATCH v4 45/75] x86/sev-es: Adjust #VC IST Stack on entering NMI handler Joerg Roedel
2020-07-15  9:47   ` Peter Zijlstra
2020-07-15 10:26     ` Joerg Roedel
2020-07-15 10:56       ` Peter Zijlstra
2020-07-14 12:08 ` [PATCH v4 46/75] x86/dumpstack/64: Add noinstr version of get_stack_info() Joerg Roedel
2020-07-14 12:08 ` [PATCH v4 47/75] x86/entry/64: Add entry code for #VC handler Joerg Roedel
2020-07-14 12:08 ` [PATCH v4 48/75] x86/sev-es: Add Runtime #VC Exception Handler Joerg Roedel
2020-07-14 12:08 ` [PATCH v4 49/75] x86/sev-es: Wire up existing #VC exit-code handlers Joerg Roedel
2020-07-14 12:08 ` [PATCH v4 50/75] x86/sev-es: Handle instruction fetches from user-space Joerg Roedel
2020-07-14 12:08 ` [PATCH v4 51/75] x86/sev-es: Handle MMIO events Joerg Roedel
2020-07-21 21:01   ` Mike Stunes
2020-07-22  7:55     ` Joerg Roedel
2020-07-22  8:05     ` Joerg Roedel
2020-07-22 22:53       ` Mike Stunes
2020-07-23  7:21         ` Joerg Roedel
2020-07-14 12:08 ` [PATCH v4 52/75] x86/sev-es: Handle MMIO String Instructions Joerg Roedel
2020-07-14 12:08 ` [PATCH v4 53/75] x86/sev-es: Handle MSR events Joerg Roedel
2020-07-14 12:08 ` [PATCH v4 54/75] x86/sev-es: Handle DR7 read/write events Joerg Roedel
2020-07-14 12:08 ` [PATCH v4 55/75] x86/sev-es: Handle WBINVD Events Joerg Roedel
2020-07-14 12:08 ` [PATCH v4 56/75] x86/sev-es: Handle RDTSC(P) Events Joerg Roedel
2020-07-14 12:08 ` [PATCH v4 57/75] x86/sev-es: Handle RDPMC Events Joerg Roedel
2020-07-14 12:09 ` [PATCH v4 58/75] x86/sev-es: Handle INVD Events Joerg Roedel
2020-07-14 12:09 ` [PATCH v4 59/75] x86/sev-es: Handle MONITOR/MONITORX Events Joerg Roedel
2020-07-14 12:09 ` [PATCH v4 60/75] x86/sev-es: Handle MWAIT/MWAITX Events Joerg Roedel
2020-07-14 12:09 ` [PATCH v4 61/75] x86/sev-es: Handle VMMCALL Events Joerg Roedel
2020-07-14 12:09 ` [PATCH v4 62/75] x86/sev-es: Handle #AC Events Joerg Roedel
2020-07-14 12:09 ` [PATCH v4 63/75] x86/sev-es: Handle #DB Events Joerg Roedel
2020-07-15  8:47   ` Peter Zijlstra
2020-07-15  9:13     ` Joerg Roedel
2020-07-15  9:51       ` Peter Zijlstra
2020-07-15 10:08         ` Joerg Roedel
2020-07-15 10:13           ` Peter Zijlstra
2020-07-15 10:31             ` Joerg Roedel
2020-07-14 12:09 ` [PATCH v4 64/75] x86/paravirt: Allow hypervisor specific VMMCALL handling under SEV-ES Joerg Roedel
2020-07-14 12:09 ` [PATCH v4 65/75] x86/kvm: Add KVM " Joerg Roedel
2020-07-14 12:09 ` [PATCH v4 66/75] x86/vmware: Add VMware specific handling for VMMCALL " Joerg Roedel
2020-07-14 12:09 ` [PATCH v4 67/75] x86/realmode: Add SEV-ES specific trampoline entry point Joerg Roedel
2020-07-14 12:09 ` [PATCH v4 68/75] x86/realmode: Setup AP jump table Joerg Roedel
2020-07-14 12:09 ` [PATCH v4 69/75] x86/head/64: Setup TSS early for secondary CPUs Joerg Roedel
2020-07-14 12:09 ` [PATCH v4 70/75] x86/head/64: Don't call verify_cpu() on starting APs Joerg Roedel
2020-07-15  1:40   ` Kees Cook
2020-07-15  9:26     ` Joerg Roedel
2020-07-15 15:26       ` Kees Cook
2020-07-15 15:48         ` Joerg Roedel
2020-07-15 19:49           ` Kees Cook
2020-07-20 15:29             ` Joerg Roedel
2020-07-14 12:09 ` [PATCH v4 71/75] x86/head/64: Rename start_cpu0 Joerg Roedel
2020-07-14 12:09 ` [PATCH v4 72/75] x86/sev-es: Support CPU offline/online Joerg Roedel
2020-07-14 12:09 ` [PATCH v4 73/75] x86/sev-es: Handle NMI State Joerg Roedel
2020-07-14 12:09 ` [PATCH v4 74/75] x86/efi: Add GHCB mappings when SEV-ES is active Joerg Roedel
2020-07-14 12:09 ` [PATCH v4 75/75] x86/sev-es: Check required CPU features for SEV-ES Joerg Roedel
2020-07-15  9:24 ` [PATCH v4 00/75] x86: SEV-ES Guest Support Peter Zijlstra
2020-07-15  9:34   ` Joerg Roedel
2020-07-15  9:55     ` Peter Zijlstra
2020-07-15 10:10       ` Joerg Roedel
2020-07-21  1:09         ` Erdem Aktas
2020-07-21 12:49           ` Joerg Roedel
2020-07-21 16:48             ` Erdem Aktas
2020-07-22  9:04               ` Joerg Roedel
2020-07-22 16:54                 ` Erdem Aktas
2020-07-22 17:45                   ` Joerg Roedel

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