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From: Jan Beulich <jbeulich@suse.com>
To: "xen-devel@lists.xenproject.org" <xen-devel@lists.xenproject.org>
Cc: "Andrew Cooper" <andrew.cooper3@citrix.com>,
	"Wei Liu" <wl@xen.org>, "Roger Pau Monné" <roger.pau@citrix.com>,
	"George Dunlap" <george.dunlap@citrix.com>
Subject: [PATCH 3/5] x86/PV: _PAGE_RW changes may take fast path of mod_l[234]_entry()
Date: Tue, 3 Nov 2020 11:57:10 +0100	[thread overview]
Message-ID: <11633161-6809-db0c-44e6-e5f383f4ebd2@suse.com> (raw)
In-Reply-To: <10a01f61-197b-7df4-192d-917fe135df70@suse.com>

The only time _PAGE_RW matters when validating an L2 or higher entry is
when a linear page table is tried to be installed. Therefore when we
disallow such at build time, we can allow _PAGE_RW changes to take the
fast paths there.

Signed-off-by: Jan Beulich <jbeulich@suse.com>

--- a/xen/arch/x86/mm.c
+++ b/xen/arch/x86/mm.c
@@ -2140,6 +2140,18 @@ static void l3t_unlock(struct page_info
     (_PAGE_NX_BIT | _PAGE_AVAIL_HIGH | _PAGE_AVAIL | _PAGE_GLOBAL | \
      _PAGE_DIRTY | _PAGE_ACCESSED | _PAGE_USER)
 
+/*
+ * PDE flags that a guest may change without re-validating the PDE.
+ * All other bits affect translation, caching, or Xen's safety. When guest
+ * created linear page tables aren't allowed, intermediate page tables may
+ * have _PAGE_RW altered without this requiring re-validation.
+ */
+#ifndef CONFIG_PV_LINEAR_PT
+# define FASTPATH_PDE_FLAG_WHITELIST (FASTPATH_FLAG_WHITELIST | _PAGE_RW)
+#else
+# define FASTPATH_PDE_FLAG_WHITELIST FASTPATH_FLAG_WHITELIST
+#endif
+
 /* Update the L1 entry at pl1e to new value nl1e. */
 static int mod_l1_entry(l1_pgentry_t *pl1e, l1_pgentry_t nl1e,
                         mfn_t gl1mfn, unsigned int cmd,
@@ -2282,7 +2294,7 @@ static int mod_l2_entry(l2_pgentry_t *pl
         nl2e = adjust_guest_l2e(nl2e, d);
 
         /* Fast path for sufficiently-similar mappings. */
-        if ( !l2e_has_changed(ol2e, nl2e, ~FASTPATH_FLAG_WHITELIST) )
+        if ( !l2e_has_changed(ol2e, nl2e, ~FASTPATH_PDE_FLAG_WHITELIST) )
         {
             if ( UPDATE_ENTRY(l2, pl2e, ol2e, nl2e, mfn, vcpu, preserve_ad) )
                 return 0;
@@ -2344,7 +2356,7 @@ static int mod_l3_entry(l3_pgentry_t *pl
         nl3e = adjust_guest_l3e(nl3e, d);
 
         /* Fast path for sufficiently-similar mappings. */
-        if ( !l3e_has_changed(ol3e, nl3e, ~FASTPATH_FLAG_WHITELIST) )
+        if ( !l3e_has_changed(ol3e, nl3e, ~FASTPATH_PDE_FLAG_WHITELIST) )
         {
             rc = UPDATE_ENTRY(l3, pl3e, ol3e, nl3e, mfn, vcpu, preserve_ad);
             return rc ? 0 : -EFAULT;
@@ -2406,7 +2418,7 @@ static int mod_l4_entry(l4_pgentry_t *pl
         nl4e = adjust_guest_l4e(nl4e, d);
 
         /* Fast path for sufficiently-similar mappings. */
-        if ( !l4e_has_changed(ol4e, nl4e, ~FASTPATH_FLAG_WHITELIST) )
+        if ( !l4e_has_changed(ol4e, nl4e, ~FASTPATH_PDE_FLAG_WHITELIST) )
         {
             rc = UPDATE_ENTRY(l4, pl4e, ol4e, nl4e, mfn, vcpu, preserve_ad);
             return rc ? 0 : -EFAULT;



  parent reply	other threads:[~2020-11-03 10:57 UTC|newest]

Thread overview: 20+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-11-03 10:54 [PATCH 0/5] x86/PV: memory management consistency and minor relaxations Jan Beulich
2020-11-03 10:56 ` [PATCH 1/5] x86/PV: consistently inline {,un}adjust_guest_l<N>e() Jan Beulich
2021-01-08 16:56   ` Roger Pau Monné
2020-11-03 10:56 ` [PATCH 2/5] x86/PV: fold redundant calls to adjust_guest_l<N>e() Jan Beulich
2021-01-11 10:36   ` Roger Pau Monné
2021-01-11 11:30     ` Jan Beulich
2020-11-03 10:57 ` Jan Beulich [this message]
2021-01-11 11:08   ` [PATCH 3/5] x86/PV: _PAGE_RW changes may take fast path of mod_l[234]_entry() Roger Pau Monné
2021-01-11 13:31     ` Jan Beulich
2021-01-11 14:26       ` Roger Pau Monné
2020-11-03 10:57 ` [PATCH 4/5] x86/PV: restrict TLB flushing after mod_l[234]_entry() Jan Beulich
2020-11-03 11:14   ` Andrew Cooper
2021-01-11 13:00   ` Roger Pau Monné
2021-01-11 13:22     ` Jan Beulich
2021-04-01  7:56       ` Ping: " Jan Beulich
2020-11-03 10:58 ` [PATCH 5/5] x86/PV32: avoid TLB flushing after mod_l3_entry() Jan Beulich
2021-01-11 14:23   ` Roger Pau Monné
2021-01-11 14:28     ` Jan Beulich
2021-01-11 15:57       ` Roger Pau Monné
2020-11-23 13:49 ` Ping: [PATCH 0/5] x86/PV: memory management consistency and minor relaxations Jan Beulich

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