From mboxrd@z Thu Jan 1 00:00:00 1970 From: Dario Faggioli Subject: Re: [PATCH v11]xen: sched: convert RTDS from time to event driven model Date: Thu, 17 Mar 2016 19:27:39 +0100 Message-ID: <1458239259.15374.67.camel@citrix.com> References: <1458230814-4317-1-git-send-email-tiche@seas.upenn.edu> Mime-Version: 1.0 Content-Type: multipart/mixed; boundary="===============5617206355381064245==" Return-path: Received: from mail6.bemta3.messagelabs.com ([195.245.230.39]) by lists.xenproject.org with esmtp (Exim 4.84_2) (envelope-from ) id 1agceA-00067O-KR for xen-devel@lists.xenproject.org; Thu, 17 Mar 2016 18:27:46 +0000 In-Reply-To: <1458230814-4317-1-git-send-email-tiche@seas.upenn.edu> List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xen.org Sender: "Xen-devel" To: Tianyang Chen , xen-devel@lists.xenproject.org Cc: george.dunlap@citrix.com, Dagaen Golomb , Meng Xu List-Id: xen-devel@lists.xenproject.org --===============5617206355381064245== Content-Type: multipart/signed; micalg=pgp-sha1; protocol="application/pgp-signature"; boundary="=-rNkARP3aVuQYXv+QM2Tw" --=-rNkARP3aVuQYXv+QM2Tw Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable On Thu, 2016-03-17 at 12:06 -0400, Tianyang Chen wrote: > The current RTDS code has several problems: > =C2=A0- the scheduler, although the algorithm is event driven by > =C2=A0=C2=A0=C2=A0nature, follows a time driven model (is invoked periodi= cally!), > =C2=A0=C2=A0=C2=A0making the code look unnatural; > =C2=A0- budget replenishment logic, budget enforcement logic and > scheduling > =C2=A0=C2=A0=C2=A0decisions are mixed and entangled, making the code hard= to > understand; > =C2=A0- the various queues of vcpus are scanned various times, making the > =C2=A0=C2=A0=C2=A0code inefficient; >=20 > This patch separates budget replenishment and enforcement. It does > that > by handling the former with a dedicated timer, and a queue of pending > replenishment events. >=20 > A replenishment queue has been added to keep track of all vcpus that > are runnable. >=20 > We also make sure that the main scheduling function is called when a > scheduling decision is necessary, such as when the currently running > vcpu runs out of budget. >=20 > Finally, when waking up a vcpu, it is now enough to tickle the > various > CPUs appropriately, like all other schedulers also do. >=20 > Signed-off-by: Tianyang Chen > Signed-off-by: Meng Xu > Signed-off-by: Dagaen Golomb > You seem to have taken care of all my remaining comments to v10, so the patch is: Reviewed-by: Dario Faggioli (which you could have put there yourself, as I said. :-)) Thanks for all the good work. If I can already point you to something else that can be improved further in this scheduler, _completely_ independently from this, and hence in a fully new patch (series), can you have a look at whether we really need set_bit(), test_and_clear(), etc, instead of __set_bit(), __test_and_clear(), etc.? I'm asking because I'm under the impression that the latter are enough, and if that is the case, we should go for them, as they're more efficient. Thanks again and Regards, Dario --=20 <> (Raistlin Majere) ----------------------------------------------------------------- Dario Faggioli, Ph.D, http://about.me/dario.faggioli Senior Software Engineer, Citrix Systems R&D Ltd., Cambridge (UK) --=-rNkARP3aVuQYXv+QM2Tw Content-Type: application/pgp-signature; name="signature.asc" Content-Description: This is a digitally signed message part Content-Transfer-Encoding: 7bit -----BEGIN PGP SIGNATURE----- Version: GnuPG v2 iEYEABECAAYFAlbq9xsACgkQk4XaBE3IOsSy/wCgmqr5++I+pxMealNbleJNiMVn IZkAoK6TrO2DX/lUg7NwcMsm33Cuxalk =aNCi -----END PGP SIGNATURE----- --=-rNkARP3aVuQYXv+QM2Tw-- --===============5617206355381064245== Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: base64 Content-Disposition: inline X19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX18KWGVuLWRldmVs IG1haWxpbmcgbGlzdApYZW4tZGV2ZWxAbGlzdHMueGVuLm9yZwpodHRwOi8vbGlzdHMueGVuLm9y Zy94ZW4tZGV2ZWwK --===============5617206355381064245==--