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From: Dirk Behme <dirk.behme@de.bosch.com>
To: xen-devel@lists.xenproject.org,
	Julien Grall <julien.grall@arm.com>,
	Stefano Stabellini <sstabellini@kernel.org>
Cc: Oleksandr Tyshchenko <oleksandr.tyshchenko@globallogic.com>,
	Iurii Konovalenko <iurii.konovalenko@globallogic.com>,
	Dirk Behme <dirk.behme@de.bosch.com>
Subject: [PATCH v2 2/2] xen/arm: drivers: scif: Drop clock source configuration
Date: Wed, 22 Jun 2016 09:18:29 +0200	[thread overview]
Message-ID: <1466579909-17008-2-git-send-email-dirk.behme@de.bosch.com> (raw)
In-Reply-To: <1466579909-17008-1-git-send-email-dirk.behme@de.bosch.com>

Besides the 14MHz external clock, the SCIF might be clocked by an
internal 66MHz clock. If this is the case, the current clock source
selection breaks this configuration. Completely drop this and rely
on the settings done by the firmware.

Signed-off-by: Dirk Behme <dirk.behme@de.bosch.com>
 xen/drivers/char/scif-uart.c | 3 ---
 1 file changed, 3 deletions(-)

diff --git a/xen/drivers/char/scif-uart.c b/xen/drivers/char/scif-uart.c
index bc157fe..8289b26 100644
--- a/xen/drivers/char/scif-uart.c
+++ b/xen/drivers/char/scif-uart.c
@@ -107,9 +107,6 @@ static void __init scif_uart_init_preirq(struct serial_port *port)
     scif_readw(uart, SCIF_SCLSR);
     scif_writew(uart, SCIF_SCLSR, 0);
-    /* Select Baud rate generator output as a clock source */
-    scif_writew(uart, SCIF_SCSCR, SCSCR_CKE10);
     /* Setup protocol format and Baud rate, select Asynchronous mode */
     val = 0;
     ASSERT( uart->data_bits >= 7 && uart->data_bits <= 8 );

Xen-devel mailing list

  reply	other threads:[~2016-06-22  7:19 UTC|newest]

Thread overview: 3+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-06-22  7:18 [PATCH v2 1/2] xen/arm: drivers: scif: Remove dead code Dirk Behme
2016-06-22  7:18 ` Dirk Behme [this message]
2016-06-22  8:42 ` Julien Grall

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