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Thread-Topic: [PATCH v5 08/11] xen/arm: Enable the existing x86 virtual PCI support for ARM. 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X-OriginatorOrg: arm.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 12 Oct 2021 16:12:29.3649 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 9d83c649-aa82-4d77-693b-08d98d9b16fd X-MS-Exchange-CrossTenant-Id: f34e5979-57d9-4aaa-ad4d-b122a662184d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=f34e5979-57d9-4aaa-ad4d-b122a662184d;Ip=[63.35.35.123];Helo=[64aa7808-outbound-1.mta.getcheckrecipient.com] X-MS-Exchange-CrossTenant-AuthSource: VE1EUR03FT011.eop-EUR03.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: AM0PR08MB3363 Hi Julien, > On 12 Oct 2021, at 16:04, Julien Grall wrote: >=20 > On 11/10/2021 13:41, Bertrand Marquis wrote: >> Hi Jan, >=20 > Hi Bertrand, >=20 >> As Rahul is on leave, I will answer you and make the changes needed. >>> On 7 Oct 2021, at 14:43, Jan Beulich wrote: >>> Independent of this - is bare metal Arm enforcing this same >>> alignment restriction (unconditionally)? Iirc on x86 we felt we'd >>> better synthesize misaligned accesses. >> Unaligned IO access could be synthesise also on arm to but I would >> rather not make such a change now without testing it (and there is >> also a question of it making sense). >=20 > Yes it makes sense. I actually have an item in my TODO list to forbid una= ligned access because they should not happen on any device we currently emu= late. >=20 > Although, I am not aware of any issue other than the guest would shoot it= self in the foot if this happens. >=20 >> So if it is ok with you I will keep that check and discuss it with Rahul >> when he is back. I will add a comment in the code to make that clear. >=20 > I am OK with it. >=20 > [...] >=20 >>> Throughout this series I haven't been able to spot where the HAS_VPCI >>> Kconfig symbol would get selected. Hence I cannot tell whether all of >>> this is Arm64-specific. Otherwise I wonder whether size 8 actually >>> can occur on Arm32. >> Dabt.size could be 3 even on ARM32 but we should not allow 64bit >> access on mmio regions on arm32. >=20 > Hmmm... Looking at the Armv7 and Armv8 spec, ldrd/strd (64-bit read) woul= d not present a valid ISV. So I think it is not be possible to have dabt.si= ze =3D 3 for 32-bit domain. But I agree we probably want to harden the code= . >=20 >> So I will surround this code with ifdef CONFIG_ARM_64 and add a test >> for len > 4 to prevent this case on 32bit. >> To be completely right we should disable this also for 32bit guests but >> this change would be a bit more invasive. >=20 > I think the following should be sufficient: >=20 > if ( is_domain_32bit_domain() && len > 4 ) > return ...; With the last request from Roger to use the function implemented in arch/x8= 6/hw/io.c, the function will move to vpci.h so using is_32bit_domain will n= ot be possible without ifdefery CONFIG_ARM. Also I have no access to the domain there. So the best I can do for now would be something like: #ifdef CONFIG_ARM_32 If (len =3D=3D 8) return false #endif A 32bit guest on 64bit xen would not be checked. Would that be ok for now ? I could add a comment in the code to warn about the limitation. Cheers Bertrand >=20 > Cheers, >=20 > --=20 > Julien Grall