From: "Michał Kowalczyk" <mkow@invisiblethingslab.com>
To: xen-devel@lists.xenproject.org
Cc: "Wei Liu" <wl@xen.org>,
"Michał Kowalczyk" <mkow@invisiblethingslab.com>,
"Andrew Cooper" <andrew.cooper3@citrix.com>,
"Marek Marczykowski-Górecki" <marmarek@invisiblethingslab.com>,
"Jan Beulich" <jbeulich@suse.com>,
"Roger Pau Monné" <roger.pau@citrix.com>
Subject: [Xen-devel] [PATCH v1] x86: Restore IA32_MISC_ENABLE on wakeup
Date: Mon, 19 Aug 2019 04:23:33 +0200 [thread overview]
Message-ID: <1c917278029b206317a2155fb78e63ed14b621e5.1566176127.git.mkow@invisiblethingslab.com> (raw)
Code in intel.c:early_init_intel() modifies IA32_MISC_ENABLE MSR. Those
modifications must be restored after resuming from S3 (see e.g. Linux wakeup
code), otherwise bad things may happen (e.g. wakeup code may cause #GP when
trying to set IA32_EFER.NXE [1]).
This bug was noticed on a ThinkPad x230 with NX disabled in the BIOS:
Xen could correctly boot, but crashed when resuming from suspend.
Applying this patch fixed the problem.
[1] Intel SDM vol 3: "If the execute-disable capability is not
available, a write to set IA32_EFER.NXE produces a #GP exception."
Signed-off-by: Michał Kowalczyk <mkow@invisiblethingslab.com>
---
xen/arch/x86/boot/trampoline.S | 6 +++---
xen/arch/x86/boot/wakeup.S | 15 +++++++++++++++
xen/arch/x86/cpu/intel.c | 2 +-
xen/include/asm-x86/processor.h | 2 +-
4 files changed, 20 insertions(+), 5 deletions(-)
diff --git a/xen/arch/x86/boot/trampoline.S b/xen/arch/x86/boot/trampoline.S
index 7c6a2328d2..fcaa3eeaf1 100644
--- a/xen/arch/x86/boot/trampoline.S
+++ b/xen/arch/x86/boot/trampoline.S
@@ -85,7 +85,7 @@ trampoline_gdt:
.long trampoline_gdt + BOOT_PSEUDORM_DS + 2 - .
.popsection
-GLOBAL(trampoline_misc_enable_off)
+GLOBAL(misc_enable_off)
.quad 0
GLOBAL(cpuid_ext_features)
@@ -117,8 +117,8 @@ trampoline_protmode_entry:
mov %eax,%cr3
/* Adjust IA32_MISC_ENABLE if needed (for NX enabling below). */
- mov bootsym_rel(trampoline_misc_enable_off,4,%esi)
- mov bootsym_rel(trampoline_misc_enable_off+4,4,%edi)
+ mov bootsym_rel(misc_enable_off,4,%esi)
+ mov bootsym_rel(misc_enable_off+4,4,%edi)
mov %esi,%eax
or %edi,%eax
jz 1f
diff --git a/xen/arch/x86/boot/wakeup.S b/xen/arch/x86/boot/wakeup.S
index e3cb9e033a..b5f825e983 100644
--- a/xen/arch/x86/boot/wakeup.S
+++ b/xen/arch/x86/boot/wakeup.S
@@ -138,6 +138,21 @@ wakeup_32:
add bootsym_rel(trampoline_xen_phys_start,4,%eax)
mov %eax,%cr3
+ /* Reapply IA32_MISC_ENABLE modifications from early_init_intel(). */
+ mov bootsym_rel(misc_enable_off, 4, %esi)
+ mov bootsym_rel(misc_enable_off+4, 4, %edi)
+ mov %esi, %eax
+ or %edi, %eax
+ jz 1f
+ mov $MSR_IA32_MISC_ENABLE, %ecx
+ rdmsr
+ not %esi
+ not %edi
+ and %esi, %eax
+ and %edi, %edx
+ wrmsr
+1:
+
/* Will cpuid feature change after resume? */
/* Set up EFER (Extended Feature Enable Register). */
mov bootsym_rel(cpuid_ext_features,4,%edi)
diff --git a/xen/arch/x86/cpu/intel.c b/xen/arch/x86/cpu/intel.c
index 5356a6ae10..a01e519281 100644
--- a/xen/arch/x86/cpu/intel.c
+++ b/xen/arch/x86/cpu/intel.c
@@ -269,7 +269,7 @@ static void early_init_intel(struct cpuinfo_x86 *c)
MSR_IA32_MISC_ENABLE_XD_DISABLE);
if (disable) {
wrmsrl(MSR_IA32_MISC_ENABLE, misc_enable & ~disable);
- bootsym(trampoline_misc_enable_off) |= disable;
+ bootsym(misc_enable_off) |= disable;
}
if (disable & MSR_IA32_MISC_ENABLE_LIMIT_CPUID)
diff --git a/xen/include/asm-x86/processor.h b/xen/include/asm-x86/processor.h
index 2862321eee..b325e4b0df 100644
--- a/xen/include/asm-x86/processor.h
+++ b/xen/include/asm-x86/processor.h
@@ -152,7 +152,7 @@ extern void (*ctxt_switch_masking)(const struct vcpu *next);
extern bool_t opt_cpu_info;
extern u32 cpuid_ext_features;
-extern u64 trampoline_misc_enable_off;
+extern u64 misc_enable_off;
/* Maximum width of physical addresses supported by the hardware. */
extern unsigned int paddr_bits;
--
2.11.0
_______________________________________________
Xen-devel mailing list
Xen-devel@lists.xenproject.org
https://lists.xenproject.org/mailman/listinfo/xen-devel
next reply other threads:[~2019-08-19 5:02 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-08-19 2:23 Michał Kowalczyk [this message]
2019-08-19 9:04 ` [Xen-devel] [PATCH v1] x86: Restore IA32_MISC_ENABLE on wakeup Andrew Cooper
2019-08-19 13:50 ` Michał Kowalczyk
2019-08-19 13:52 ` Andrew Cooper
2019-08-19 13:56 ` Michał Kowalczyk
2019-08-19 17:28 ` Andrew Cooper
2019-08-19 18:01 ` Michał Kowalczyk
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=1c917278029b206317a2155fb78e63ed14b621e5.1566176127.git.mkow@invisiblethingslab.com \
--to=mkow@invisiblethingslab.com \
--cc=andrew.cooper3@citrix.com \
--cc=jbeulich@suse.com \
--cc=marmarek@invisiblethingslab.com \
--cc=roger.pau@citrix.com \
--cc=wl@xen.org \
--cc=xen-devel@lists.xenproject.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).