From: Marc Zyngier <marc.zyngier@arm.com>
To: Julien Grall <julien.grall@citrix.com>
Cc: Michal Marek <mmarek@suse.cz>,
"Ian.Campbell@citrix.com" <Ian.Campbell@citrix.com>,
"vijay.kilari@gmail.com" <vijay.kilari@gmail.com>,
Stefano Stabellini <Stefano.Stabellini@eu.citrix.com>,
"manish.jaggi@caviumnetworks.com"
<manish.jaggi@caviumnetworks.com>, "tim@xen.org" <tim@xen.org>,
"xen-devel@lists.xen.org" <xen-devel@lists.xen.org>,
"stefano.stabellini@citrix.com" <stefano.stabellini@citrix.com>,
Vijaya Kumar K <Vijaya.Kumar@caviumnetworks.com>
Subject: Re: [PATCH v5 20/22] xen/arm: ITS: Map ITS translation space
Date: Tue, 18 Aug 2015 23:37:48 +0100 [thread overview]
Message-ID: <20150818233748.66b4cee6@arm.com> (raw)
In-Reply-To: <55D38423.6000006@citrix.com>
On Tue, 18 Aug 2015 20:14:43 +0100
Julien Grall <julien.grall@citrix.com> wrote:
> Hi,
>
> On 27/07/2015 04:12, vijay.kilari@gmail.com wrote:
> > From: Vijaya Kumar K <Vijaya.Kumar@caviumnetworks.com>
> >
> > ITS translation space contains GITS_TRANSLATOR register
>
> s/GITS_TRANSLATOR/GITS_TRANSLATOR/
I assume you mean GITS_TRANSLATER? ;-)
>
> > which is written by device to raise LPI. This space needs
> > to mapped to every domain address space for all physical
> > ITS available,so that device can access GITS_TRANSLATOR
>
> Ditto
>
> > register using SMMU.
>
> Marc pointed me today that if the processor is writing into
> GITS_TRANSLATER it may be able to deadlock the system.
>
> Reading more closely the spec (8.1.3 IHI0069A), there is undefined
> behavior when writing to this register with wrong access size.
>
> Currently the page table are shared between the processor and the SMMU,
> so that means that a domain will be able to deadlock the processor and
> therefore the whole platform.
Indeed. A CPU should *never* be able to write to the GITS_TRANSLATER
register. What would be the meaning anyway? How would a DeviceID be
sampled? This is definitely UNPREDICTIBLE territory, and you want to
make sure a guest cannot directly write to the HW.
> So we should never expose GITS_TRANSLATER into the processor page table.
> Which means unsharing some parts if not all of the page tables between
> the processor and the SMMU.
Agreed. It looks to me like the CPU should only see the the virtual
ITS, and nothing else.
Thanks,
M.
--
Jazz is not dead. It just smells funny.
next prev parent reply other threads:[~2015-08-18 22:37 UTC|newest]
Thread overview: 81+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-07-27 11:11 [PATCH v5 00/22] Add ITS support vijay.kilari
2015-07-27 11:11 ` [PATCH v5 01/22] xen/arm: Return success if dt node does not have irq mapping vijay.kilari
2015-07-28 13:13 ` Julien Grall
2015-07-28 13:23 ` Ian Campbell
2015-07-28 13:27 ` Julien Grall
2015-09-02 15:25 ` Ian Campbell
2015-07-27 11:11 ` [PATCH v5 02/22] xen/arm: Add bitmap_find_next_zero_area helper function vijay.kilari
2015-08-11 13:53 ` Jan Beulich
2015-07-27 11:11 ` [PATCH v5 03/22] xen: Add log2 functionality vijay.kilari
2015-07-27 11:11 ` [PATCH v5 04/22] xen/arm: Set nr_cpu_ids to available number of cpus vijay.kilari
2015-07-28 13:21 ` Julien Grall
2015-07-27 11:11 ` [PATCH v5 05/22] xen/arm: ITS: Port ITS driver to Xen vijay.kilari
2015-07-28 16:46 ` Julien Grall
2015-07-29 15:22 ` Vijay Kilari
2015-07-29 16:06 ` Ian Campbell
2015-07-29 16:18 ` Vijay Kilari
2015-07-31 10:28 ` Vijay Kilari
2015-07-31 11:10 ` Julien Grall
2015-07-27 11:11 ` [PATCH v5 06/22] xen/arm: ITS: Add helper functions to manage its_devices vijay.kilari
2015-07-27 11:11 ` [PATCH v5 07/22] xen/arm: ITS: Add virtual ITS driver vijay.kilari
2015-07-28 17:13 ` Julien Grall
2015-07-31 6:49 ` Vijay Kilari
2015-07-31 10:14 ` Julien Grall
2015-07-31 10:32 ` Ian Campbell
2015-07-27 11:11 ` [PATCH v5 08/22] xen/arm: ITS: Add virtual ITS commands support vijay.kilari
2015-07-28 18:04 ` Julien Grall
2015-07-31 6:57 ` Vijay Kilari
2015-07-31 10:16 ` Julien Grall
2015-07-27 11:11 ` [PATCH v5 09/22] xen/arm: ITS: Export ITS info to Virtual ITS vijay.kilari
2015-07-28 18:14 ` Julien Grall
2015-07-31 7:01 ` Vijay Kilari
2015-08-03 15:58 ` Julien Grall
2015-07-27 11:11 ` [PATCH v5 10/22] xen/arm: ITS: Add GITS registers emulation vijay.kilari
2015-07-28 19:01 ` Julien Grall
2015-07-31 7:25 ` Vijay Kilari
2015-07-31 10:28 ` Julien Grall
2015-08-01 8:50 ` Vijay Kilari
2015-08-03 11:19 ` Julien Grall
2015-07-27 11:11 ` [PATCH v5 11/22] xen/arm: ITS: Enable physical and virtual ITS driver compilation vijay.kilari
2015-07-27 11:11 ` [PATCH v5 12/22] xen/arm: ITS: Add GICR register emulation vijay.kilari
2015-07-30 17:04 ` Julien Grall
2015-07-31 9:08 ` Vijay Kilari
2015-07-31 11:05 ` Julien Grall
2015-08-01 10:25 ` Vijay Kilari
2015-08-01 15:51 ` Julien Grall
2015-08-03 9:36 ` Vijay Kilari
2015-08-03 13:01 ` Julien Grall
2015-08-03 13:51 ` Vijay Kilari
2015-08-03 13:58 ` Julien Grall
2015-08-04 6:55 ` Vijay Kilari
2015-08-04 8:44 ` Julien Grall
2015-07-27 11:11 ` [PATCH v5 13/22] xen/arm: ITS: Implement gic_is_lpi helper function vijay.kilari
2015-07-30 17:14 ` Julien Grall
2015-07-27 11:11 ` [PATCH v5 14/22] xen/arm: ITS: Allocate irq descriptors for LPIs vijay.kilari
2015-08-04 13:21 ` Julien Grall
2015-07-27 11:11 ` [PATCH v5 15/22] xen/arm: ITS: implement hw_irq_controller " vijay.kilari
2015-08-04 13:45 ` Julien Grall
2015-08-06 8:15 ` Vijay Kilari
2015-08-06 10:05 ` Julien Grall
2015-08-06 10:11 ` Julien Grall
2015-07-27 11:11 ` [PATCH v5 16/22] xen/arm: ITS: Route LPIs vijay.kilari
2015-08-04 14:54 ` Julien Grall
2015-07-27 11:11 ` [PATCH v5 17/22] xen/arm: ITS: Initialize physical ITS vijay.kilari
2015-08-17 19:00 ` Julien Grall
2015-07-27 11:12 ` [PATCH v5 18/22] xen/arm: ITS: Add domain specific ITS initialization vijay.kilari
2015-08-17 18:57 ` Julien Grall
2015-07-27 11:12 ` [PATCH v5 19/22] xen/arm: ITS: Add APIs to add and assign device vijay.kilari
2015-08-17 19:17 ` Julien Grall
2015-07-27 11:12 ` [PATCH v5 20/22] xen/arm: ITS: Map ITS translation space vijay.kilari
2015-08-17 19:20 ` Julien Grall
2015-08-18 19:14 ` Julien Grall
2015-08-18 22:37 ` Marc Zyngier [this message]
2015-09-02 15:45 ` Ian Campbell
2015-09-02 15:59 ` Marc Zyngier
2015-07-27 11:12 ` [PATCH v5 21/22] xen/arm: ITS: Generate ITS node for Dom0 vijay.kilari
2015-08-17 19:41 ` Julien Grall
2015-08-21 23:02 ` Vijay Kilari
2015-08-21 23:48 ` Julien Grall
2015-08-26 12:40 ` Vijay Kilari
2015-08-27 0:02 ` Julien Grall
2015-07-27 11:12 ` [PATCH v5 22/22] xen/arm: ITS: Add pci devices in ThunderX vijay.kilari
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20150818233748.66b4cee6@arm.com \
--to=marc.zyngier@arm.com \
--cc=Ian.Campbell@citrix.com \
--cc=Stefano.Stabellini@eu.citrix.com \
--cc=Vijaya.Kumar@caviumnetworks.com \
--cc=julien.grall@citrix.com \
--cc=manish.jaggi@caviumnetworks.com \
--cc=mmarek@suse.cz \
--cc=stefano.stabellini@citrix.com \
--cc=tim@xen.org \
--cc=vijay.kilari@gmail.com \
--cc=xen-devel@lists.xen.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).