From: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
To: Andrew Cooper <andrew.cooper3@citrix.com>
Cc: Xen-devel <xen-devel@lists.xen.org>
Subject: Re: [PATCH v3 05/28] xen/x86: Collect more cpuid feature leaves
Date: Wed, 16 Mar 2016 04:50:15 -0400 [thread overview]
Message-ID: <20160316085014.GE31144@char.us.oracle.com> (raw)
In-Reply-To: <1458056124-8024-6-git-send-email-andrew.cooper3@citrix.com>
On Tue, Mar 15, 2016 at 03:35:01PM +0000, Andrew Cooper wrote:
> New words are:
> * 0x80000007.edx - Contains Invarient TSC
> * 0x80000008.ebx - Newly used for AMD Zen processors
>
> In addition, replace some open-coded ITSC and EFRO manipulation.
>
> Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
> Acked-by: Jan Beulich <JBeulich@suse.com>
Reviewed-by: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
> ---
>
> v2:
> * Rely on ordering of generic_identify() to simplify init_amd()
> * Remove opencoded EFRO manipulation as well
> ---
> xen/arch/x86/cpu/amd.c | 21 +++------------------
> xen/arch/x86/cpu/common.c | 6 ++++++
> xen/arch/x86/cpu/intel.c | 2 +-
> xen/arch/x86/domain.c | 2 +-
> 4 files changed, 11 insertions(+), 20 deletions(-)
>
> diff --git a/xen/arch/x86/cpu/amd.c b/xen/arch/x86/cpu/amd.c
> index a4bef21..47a38c6 100644
> --- a/xen/arch/x86/cpu/amd.c
> +++ b/xen/arch/x86/cpu/amd.c
> @@ -294,21 +294,6 @@ int cpu_has_amd_erratum(const struct cpuinfo_x86 *cpu, int osvw_id, ...)
> return 0;
> }
>
> -/* Can this system suffer from TSC drift due to C1 clock ramping? */
> -static int c1_ramping_may_cause_clock_drift(struct cpuinfo_x86 *c)
> -{
> - if (cpuid_edx(0x80000007) & (1<<8)) {
> - /*
> - * CPUID.AdvPowerMgmtInfo.TscInvariant
> - * EDX bit 8, 8000_0007
> - * Invariant TSC on 8th Gen or newer, use it
> - * (assume all cores have invariant TSC)
> - */
> - return 0;
> - }
> - return 1;
> -}
> -
> /*
> * Disable C1-Clock ramping if enabled in PMM7.CpuLowPwrEnh on 8th-generation
> * cores only. Assume BIOS has setup all Northbridges equivalently.
> @@ -475,7 +460,7 @@ static void init_amd(struct cpuinfo_x86 *c)
> }
>
> if (c->extended_cpuid_level >= 0x80000007) {
> - if (cpuid_edx(0x80000007) & (1<<8)) {
> + if (cpu_has(c, X86_FEATURE_ITSC)) {
> __set_bit(X86_FEATURE_CONSTANT_TSC, c->x86_capability);
> __set_bit(X86_FEATURE_NONSTOP_TSC, c->x86_capability);
> if (c->x86 != 0x11)
> @@ -600,14 +585,14 @@ static void init_amd(struct cpuinfo_x86 *c)
> wrmsrl(MSR_K7_PERFCTR3, 0);
> }
>
> - if (cpuid_edx(0x80000007) & (1 << 10)) {
> + if (cpu_has(c, X86_FEATURE_EFRO)) {
> rdmsr(MSR_K7_HWCR, l, h);
> l |= (1 << 27); /* Enable read-only APERF/MPERF bit */
> wrmsr(MSR_K7_HWCR, l, h);
> }
>
> /* Prevent TSC drift in non single-processor, single-core platforms. */
> - if ((smp_processor_id() == 1) && c1_ramping_may_cause_clock_drift(c))
> + if ((smp_processor_id() == 1) && !cpu_has(c, X86_FEATURE_ITSC))
> disable_c1_ramping();
>
> set_cpuidmask(c);
> diff --git a/xen/arch/x86/cpu/common.c b/xen/arch/x86/cpu/common.c
> index 8b94c1b..1a278b1 100644
> --- a/xen/arch/x86/cpu/common.c
> +++ b/xen/arch/x86/cpu/common.c
> @@ -269,6 +269,12 @@ static void generic_identify(struct cpuinfo_x86 *c)
>
> if (c->extended_cpuid_level >= 0x80000004)
> get_model_name(c); /* Default name */
> + if (c->extended_cpuid_level >= 0x80000007)
> + c->x86_capability[cpufeat_word(X86_FEATURE_ITSC)]
> + = cpuid_edx(0x80000007);
> + if (c->extended_cpuid_level >= 0x80000008)
> + c->x86_capability[cpufeat_word(X86_FEATURE_CLZERO)]
> + = cpuid_ebx(0x80000008);
>
> /* Intel-defined flags: level 0x00000007 */
> if ( c->cpuid_level >= 0x00000007 )
> diff --git a/xen/arch/x86/cpu/intel.c b/xen/arch/x86/cpu/intel.c
> index d4f574b..bdf89f6 100644
> --- a/xen/arch/x86/cpu/intel.c
> +++ b/xen/arch/x86/cpu/intel.c
> @@ -281,7 +281,7 @@ static void init_intel(struct cpuinfo_x86 *c)
> if ((c->x86 == 0xf && c->x86_model >= 0x03) ||
> (c->x86 == 0x6 && c->x86_model >= 0x0e))
> __set_bit(X86_FEATURE_CONSTANT_TSC, c->x86_capability);
> - if (cpuid_edx(0x80000007) & (1u<<8)) {
> + if (cpu_has(c, X86_FEATURE_ITSC)) {
> __set_bit(X86_FEATURE_CONSTANT_TSC, c->x86_capability);
> __set_bit(X86_FEATURE_NONSTOP_TSC, c->x86_capability);
> __set_bit(X86_FEATURE_TSC_RELIABLE, c->x86_capability);
> diff --git a/xen/arch/x86/domain.c b/xen/arch/x86/domain.c
> index a6d721b..27fcae1 100644
> --- a/xen/arch/x86/domain.c
> +++ b/xen/arch/x86/domain.c
> @@ -2615,7 +2615,7 @@ void domain_cpuid(
> */
> if ( (input == 0x80000007) && /* Advanced Power Management */
> !d->disable_migrate && !d->arch.vtsc )
> - *edx &= ~(1u<<8); /* TSC Invariant */
> + *edx &= ~cpufeat_mask(X86_FEATURE_ITSC);
>
> return;
> }
> --
> 2.1.4
>
>
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next prev parent reply other threads:[~2016-03-16 8:50 UTC|newest]
Thread overview: 88+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-03-15 15:34 [PATCH RFC v3 00/28] x86: Improvements to cpuid handling for guests Andrew Cooper
2016-03-15 15:34 ` [PATCH v3 01/28] xen/x86: Drop unused and non-useful feature definitions Andrew Cooper
2016-03-16 7:53 ` Konrad Rzeszutek Wilk
2016-03-16 9:49 ` Andrew Cooper
2016-03-22 14:06 ` Doug Goldstein
2016-03-22 14:38 ` Jan Beulich
2016-03-15 15:34 ` [PATCH v3 02/28] xen/x86: Rename features to be closer to the vendor definitions Andrew Cooper
2016-03-16 8:01 ` Konrad Rzeszutek Wilk
2016-03-17 19:46 ` Andrew Cooper
2016-03-15 15:34 ` [PATCH v3 03/28] xen/public: Export cpu featureset information in the public API Andrew Cooper
2016-03-16 8:32 ` Konrad Rzeszutek Wilk
2016-03-22 10:39 ` Andrew Cooper
2016-03-18 15:52 ` Jan Beulich
2016-03-15 15:35 ` [PATCH v3 04/28] xen/x86: Script to automatically process featureset information Andrew Cooper
2016-03-16 8:41 ` Konrad Rzeszutek Wilk
2016-03-15 15:35 ` [PATCH v3 05/28] xen/x86: Collect more cpuid feature leaves Andrew Cooper
2016-03-16 8:50 ` Konrad Rzeszutek Wilk [this message]
2016-03-15 15:35 ` [PATCH v3 06/28] xen/x86: Mask out unknown features from Xen's capabilities Andrew Cooper
2016-03-16 18:01 ` Konrad Rzeszutek Wilk
2016-03-15 15:35 ` [PATCH v3 07/28] xen/x86: Annotate special features Andrew Cooper
2016-03-16 18:04 ` Konrad Rzeszutek Wilk
2016-03-18 16:29 ` Jan Beulich
2016-03-15 15:35 ` [PATCH v3 08/28] xen/x86: Annotate VM applicability in featureset Andrew Cooper
2016-03-16 18:15 ` Konrad Rzeszutek Wilk
2016-03-18 16:57 ` Jan Beulich
2016-03-18 18:56 ` Andrew Cooper
2016-03-21 11:53 ` Jan Beulich
2016-03-21 13:39 ` Andrew Cooper
2016-03-15 15:35 ` [PATCH v3 09/28] xen/x86: Calculate maximum host and guest featuresets Andrew Cooper
2016-03-16 18:24 ` Konrad Rzeszutek Wilk
2016-03-18 17:09 ` Jan Beulich
2016-03-22 11:23 ` Andrew Cooper
2016-03-22 12:39 ` Jan Beulich
2016-03-22 14:37 ` Andrew Cooper
2016-03-22 14:52 ` Jan Beulich
2016-03-22 15:01 ` Andrew Cooper
2016-03-22 16:10 ` Jan Beulich
2016-03-15 15:35 ` [PATCH v3 10/28] xen/x86: Generate deep dependencies of features Andrew Cooper
2016-03-17 19:45 ` Konrad Rzeszutek Wilk
2016-03-17 20:14 ` Andrew Cooper
2016-03-17 20:32 ` Konrad Rzeszutek Wilk
2016-03-21 15:41 ` Jan Beulich
2016-03-15 15:35 ` [PATCH v3 11/28] xen/x86: Clear dependent features when clearing a cpu cap Andrew Cooper
2016-03-17 19:51 ` Konrad Rzeszutek Wilk
2016-03-17 19:56 ` Andrew Cooper
2016-03-28 15:02 ` Konrad Rzeszutek Wilk
2016-03-21 15:45 ` Jan Beulich
2016-03-15 15:35 ` [PATCH v3 12/28] xen/x86: Improve disabling of features which have dependencies Andrew Cooper
2016-03-15 15:35 ` [PATCH v3 13/28] xen/x86: Improvements to in-hypervisor cpuid sanity checks Andrew Cooper
2016-03-21 16:11 ` Jan Beulich
2016-03-22 15:30 ` Andrew Cooper
2016-03-15 15:35 ` [PATCH v3 14/28] x86/cpu: Move set_cpumask() calls into c_early_init() Andrew Cooper
2016-03-21 16:16 ` Jan Beulich
2016-03-15 15:35 ` [PATCH v3 15/28] x86/cpu: Sysctl and common infrastructure for levelling context switching Andrew Cooper
2016-03-15 17:35 ` Joao Martins
2016-03-15 19:29 ` Andrew Cooper
2016-03-15 19:34 ` Joao Martins
2016-03-21 16:23 ` Jan Beulich
2016-03-22 15:57 ` Andrew Cooper
2016-03-22 16:16 ` Jan Beulich
2016-03-15 15:35 ` [PATCH v3 16/28] x86/cpu: Rework AMD masking MSR setup Andrew Cooper
2016-03-21 16:51 ` Jan Beulich
2016-03-21 16:55 ` Andrew Cooper
2016-03-15 15:35 ` [PATCH v3 17/28] x86/cpu: Rework Intel masking/faulting setup Andrew Cooper
2016-03-21 16:44 ` Jan Beulich
2016-03-15 15:35 ` [PATCH v3 18/28] x86/cpu: Context switch cpuid masks and faulting state in context_switch() Andrew Cooper
2016-03-15 15:35 ` [PATCH v3 19/28] x86/pv: Provide custom cpumasks for PV domains Andrew Cooper
2016-03-21 16:53 ` Jan Beulich
2016-03-15 15:35 ` [PATCH v3 20/28] x86/domctl: Update PV domain cpumasks when setting cpuid policy Andrew Cooper
2016-03-21 17:06 ` Jan Beulich
2016-03-22 16:37 ` Andrew Cooper
2016-03-22 16:51 ` Jan Beulich
2016-03-15 15:35 ` [PATCH v3 21/28] xen+tools: Export maximum host and guest cpu featuresets via SYSCTL Andrew Cooper
2016-03-16 18:23 ` Wei Liu
2016-03-16 20:38 ` David Scott
2016-03-22 8:43 ` Jan Beulich
2016-03-22 20:39 ` Andrew Cooper
2016-03-15 15:35 ` [PATCH v3 22/28] tools/libxc: Modify bitmap operations to take void pointers Andrew Cooper
2016-03-16 15:24 ` Andrew Cooper
2016-03-17 12:17 ` Wei Liu
2016-03-15 15:35 ` [PATCH v3 23/28] tools/libxc: Use public/featureset.h for cpuid policy generation Andrew Cooper
2016-03-15 15:35 ` [PATCH v3 24/28] tools/libxc: Expose the automatically generated cpu featuremask information Andrew Cooper
2016-03-15 15:35 ` [PATCH v3 25/28] tools: Utility for dealing with featuresets Andrew Cooper
2016-03-16 18:23 ` Wei Liu
2016-03-15 15:35 ` [PATCH v3 26/28] tools/libxc: Wire a featureset through to cpuid policy logic Andrew Cooper
2016-03-15 15:35 ` [PATCH v3 27/28] tools/libxc: Use featuresets rather than guesswork Andrew Cooper
2016-03-15 15:35 ` [PATCH v3 28/28] tools/libxc: Calculate xstate cpuid leaf from guest information Andrew Cooper
2016-03-16 18:23 ` Wei Liu
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