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From: "Mihai Donțu" <mdontu@bitdefender.com>
To: xen-devel@lists.xen.org
Cc: Andrew Cooper <andrew.cooper3@citrix.com>,
	Zhi Wang <zhi.a.wang@intel.com>, Jan Beulich <jbeulich@suse.com>
Subject: [PATCH v2 2/3] x86/emulate: add support of emulating SSE2 instruction {, v}movd mm, m32
Date: Mon, 18 Jul 2016 17:30:19 +0300	[thread overview]
Message-ID: <20160718143020.14828-2-mdontu@bitdefender.com> (raw)
In-Reply-To: <20160718143020.14828-1-mdontu@bitdefender.com>

Found that Windows driver was using a SSE2 instruction MOVD.

Signed-off-by: Zhi Wang <zhi.a.wang@intel.com>
Signed-off-by: Mihai Donțu <mdontu@bitdefender.com>
---
Picked from the XenServer 7 patch queue, as suggested by Andrew Cooper
---
 xen/arch/x86/x86_emulate/x86_emulate.c | 30 +++++++++++++++++++++++++++---
 1 file changed, 27 insertions(+), 3 deletions(-)

diff --git a/xen/arch/x86/x86_emulate/x86_emulate.c b/xen/arch/x86/x86_emulate/x86_emulate.c
index 0301235..2a56a67 100644
--- a/xen/arch/x86/x86_emulate/x86_emulate.c
+++ b/xen/arch/x86/x86_emulate/x86_emulate.c
@@ -204,7 +204,7 @@ static uint8_t twobyte_table[256] = {
     /* 0x60 - 0x6F */
     0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, ImplicitOps|ModRM,
     /* 0x70 - 0x7F */
-    0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, ImplicitOps|ModRM,
+    0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, ImplicitOps|ModRM, ImplicitOps|ModRM,
     /* 0x80 - 0x87 */
     ImplicitOps, ImplicitOps, ImplicitOps, ImplicitOps,
     ImplicitOps, ImplicitOps, ImplicitOps, ImplicitOps,
@@ -4409,6 +4409,10 @@ x86_emulate(
     case 0x6f: /* movq mm/m64,mm */
                /* {,v}movdq{a,u} xmm/m128,xmm */
                /* vmovdq{a,u} ymm/m256,ymm */
+    case 0x7e: /* movd mm,r/m32 */
+               /* movq mm,r/m64 */
+               /* {,v}movd xmm,r/m32 */
+               /* {,v}movq xmm,r/m64 */
     case 0x7f: /* movq mm,mm/m64 */
                /* {,v}movdq{a,u} xmm,xmm/m128 */
                /* vmovdq{a,u} ymm,ymm/m256 */
@@ -4432,7 +4436,17 @@ x86_emulate(
                 host_and_vcpu_must_have(sse2);
                 buf[0] = 0x66; /* SSE */
                 get_fpu(X86EMUL_FPU_xmm, &fic);
-                ea.bytes = (b == 0xd6 ? 8 : 16);
+                switch ( b )
+                {
+                case 0x7e:
+                    ea.bytes = 4;
+                    break;
+                case 0xd6:
+                    ea.bytes = 8;
+                    break;
+                default:
+                    ea.bytes = 16;
+                }
                 break;
             case vex_none:
                 if ( b != 0xe7 )
@@ -4452,7 +4466,17 @@ x86_emulate(
                     ((vex.pfx != vex_66) && (vex.pfx != vex_f3)));
             host_and_vcpu_must_have(avx);
             get_fpu(X86EMUL_FPU_ymm, &fic);
-            ea.bytes = (b == 0xd6 ? 8 : 16 << vex.l);
+            switch ( b )
+            {
+            case 0x7e:
+                ea.bytes = 4;
+                break;
+            case 0xd6:
+                ea.bytes = 8;
+                break;
+            default:
+                ea.bytes = 16 << vex.l;
+            }
         }
         if ( ea.type == OP_MEM )
         {
--
2.9.2


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  reply	other threads:[~2016-07-18 14:30 UTC|newest]

Thread overview: 7+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-07-18 14:30 [PATCH v2 1/3] x86/emulate: add support for {, v}movq xmm, xmm/m64 Mihai Donțu
2016-07-18 14:30 ` Mihai Donțu [this message]
2016-07-18 14:57   ` [PATCH v2 2/3] x86/emulate: add support of emulating SSE2 instruction {, v}movd mm, m32 Andrew Cooper
2016-07-19 20:35     ` Mihai Donțu
2016-07-18 14:30 ` [PATCH v2 3/3] x86/emulate: added tests for " Mihai Donțu
2016-07-18 14:57   ` Andrew Cooper
2016-07-18 14:41 ` [PATCH v2 1/3] x86/emulate: add support for {, v}movq xmm, xmm/m64 Andrew Cooper

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