xen-devel.lists.xenproject.org archive mirror
 help / color / mirror / Atom feed
From: Chao Gao <chao.gao@intel.com>
To: Jan Beulich <JBeulich@suse.com>
Cc: Andrew Cooper <andrew.cooper3@citrix.com>,
	Kevin Tian <kevin.tian@intel.com>,
	Jun Nakajima <jun.nakajima@intel.com>,
	xen-devel@lists.xen.org
Subject: Re: [PATCH v2] VT-d PI: disable VT-d PI when APICv is disabled
Date: Wed, 7 Jun 2017 23:06:30 +0800	[thread overview]
Message-ID: <20170607150627.GA147743@skl-2s3.sh.intel.com> (raw)
In-Reply-To: <59380E36020000780016059B@prv-mh.provo.novell.com>

On Wed, Jun 07, 2017 at 06:31:18AM -0600, Jan Beulich wrote:
>>>> On 07.06.17 at 11:29, <chao.gao@intel.com> wrote:
>> @@ -2266,8 +2267,10 @@ int __init intel_vtd_setup(void)
>>           * We cannot use posted interrupt if X86_FEATURE_CX16 is
>>           * not supported, since we count on this feature to
>>           * atomically update 16-byte IRTE in posted format.
>> +         * VT-d PI implementation relies on APICv. Thus, disable
>> +         * VT-d PI when APICv is disabled.
>>           */
>> -        if ( !cap_intr_post(iommu->cap) || !cpu_has_cx16 )
>> +        if ( !cap_intr_post(iommu->cap) || !cpu_has_cx16 || !opt_apicv_enabled )
>>              iommu_intpost = 0;
>
>I'm sorry for thinking of this only now, but why do you check the
>command line option here instead of whether APIC-V is actually
>in use? I guess there's not going to be hardware supporting VT-d
>PI but not APIC-V (albeit one is a chipset feature aiui and the
>other a CPU one, so they are kind of independent), but I could
>easily imagine hypervisors supporting them entirely independently.
>Hence I think you would be better off checking the relevant
>secondary exec bit(s).

Those relevant structure hasn't been initialized here. But your
thought is definitely right. How about clear iommu_intpost in
vmx_init_vmcs_config() when finding cpu-side interrupt posting
can't be enabled?

Thanks
Chao

_______________________________________________
Xen-devel mailing list
Xen-devel@lists.xen.org
https://lists.xen.org/xen-devel

  reply	other threads:[~2017-06-07 15:06 UTC|newest]

Thread overview: 4+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-06-07  9:29 [PATCH v2] VT-d PI: disable VT-d PI when APICv is disabled Chao Gao
2017-06-07 12:31 ` Jan Beulich
2017-06-07 15:06   ` Chao Gao [this message]
2017-06-07 15:34     ` Jan Beulich

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20170607150627.GA147743@skl-2s3.sh.intel.com \
    --to=chao.gao@intel.com \
    --cc=JBeulich@suse.com \
    --cc=andrew.cooper3@citrix.com \
    --cc=jun.nakajima@intel.com \
    --cc=kevin.tian@intel.com \
    --cc=xen-devel@lists.xen.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body. 
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).