From: "Roger Pau Monné" <roger.pau@citrix.com>
To: Jan Beulich <jbeulich@suse.com>
Cc: George Dunlap <George.Dunlap@eu.citrix.com>,
AndrewCooper <andrew.cooper3@citrix.com>, Wei Liu <wl@xen.org>,
"xen-devel@lists.xenproject.org" <xen-devel@lists.xenproject.org>
Subject: Re: [Xen-devel] [PATCH 9/9] x86: PCID is unused when !PV
Date: Thu, 12 Sep 2019 17:57:43 +0200 [thread overview]
Message-ID: <20190912155743.jwb6gzqjfjrokh6h@Air-de-Roger> (raw)
In-Reply-To: <38a24f1a-9ed4-edb1-a0e2-193170fc6eee@suse.com>
On Thu, Sep 12, 2019 at 05:48:16PM +0200, Jan Beulich wrote:
> On 12.09.2019 17:31, Roger Pau Monné wrote:
> > On Wed, Sep 11, 2019 at 05:26:46PM +0200, Jan Beulich wrote:
> >> @@ -301,8 +305,12 @@ static inline void write_cr4(unsigned lo
> >> {
> >> struct cpu_info *info = get_cpu_info();
> >>
> >> +#ifdef CONFIG_PV
> >> /* No global pages in case of PCIDs enabled! */
> >> ASSERT(!(val & X86_CR4_PGE) || !(val & X86_CR4_PCIDE));
> >> +#else
> >> + ASSERT(!(val & X86_CR4_PCIDE));
> >
> > That assert seems quite pointless, you have set X86_CR4_PCIDE to 0, so
> > this is never going to trigger?
>
> I was about to drop this, but I have to take back my earlier
> reply: The #ifdef you talk about is in flushtlb.c, whereas
> here we're in processor.h.
Oh yes, sorry for not realizing. In order to avoid the ifdefary maybe
you could write the above as:
ASSERT((IS_ENABLED(CONFIG_PV) && !(val & X86_CR4_PGE)) ||
!(val & X86_CR4_PCIDE));
I don't have a strong opinion though, maybe my proposed version is
actually harder to read than the ifdef'ed one.
Thanks, Roger.
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next prev parent reply other threads:[~2019-09-12 15:58 UTC|newest]
Thread overview: 32+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-09-11 15:15 [Xen-devel] [PATCH RESEND/PING 0/9] XSA-292 follow-up Jan Beulich
2019-09-11 15:21 ` [Xen-devel] [PATCH 1/9] x86: adjust cr3_pcid() return type Jan Beulich
2019-09-12 9:19 ` Roger Pau Monné
2019-09-11 15:22 ` [Xen-devel] [PATCH 2/9] x86: limit the amount of TLB flushing in switch_cr3_cr4() Jan Beulich
2019-09-12 9:54 ` Roger Pau Monné
2019-09-12 10:11 ` Jan Beulich
2019-09-12 10:38 ` Roger Pau Monné
2019-09-11 15:22 ` [Xen-devel] [PATCH 3/9] x86/mm: honor opt_pcid also for 32-bit PV domains Jan Beulich
2019-09-12 10:34 ` Roger Pau Monné
2019-09-12 10:45 ` Jan Beulich
2019-09-11 15:23 ` [Xen-devel] [PATCH 4/9] x86/HVM: move NOFLUSH handling out of hvm_set_cr3() Jan Beulich
2019-09-12 11:35 ` Roger Pau Monné
2019-09-12 11:52 ` Jan Beulich
2019-09-12 14:44 ` Roger Pau Monné
2019-09-12 14:47 ` Jan Beulich
2019-09-12 15:42 ` Roger Pau Monné
2019-09-12 15:52 ` Jan Beulich
2019-09-11 15:24 ` [Xen-devel] [PATCH 5/9] x86/HVM: refuse CR3 loads with reserved (upper) bits set Jan Beulich
2019-09-12 11:45 ` Roger Pau Monné
2019-09-12 12:01 ` Jan Beulich
2019-09-11 15:25 ` [Xen-devel] [PATCH 6/9] x86/HVM: relax shadow mode check in hvm_set_cr3() Jan Beulich
2019-09-12 14:50 ` Roger Pau Monné
2019-09-11 15:25 ` [Xen-devel] [PATCH 7/9] x86/HVM: cosmetics to hvm_set_cr3() Jan Beulich
2019-09-12 15:04 ` Roger Pau Monné
2019-09-11 15:26 ` [Xen-devel] [PATCH 8/9] x86/CPUID: drop INVPCID dependency on PCID Jan Beulich
2019-09-12 15:11 ` Roger Pau Monné
2019-09-11 15:26 ` [Xen-devel] [PATCH 9/9] x86: PCID is unused when !PV Jan Beulich
2019-09-12 15:31 ` Roger Pau Monné
2019-09-12 15:46 ` Jan Beulich
2019-09-12 15:48 ` Jan Beulich
2019-09-12 15:57 ` Roger Pau Monné [this message]
-- strict thread matches above, loose matches on Subject: below --
2019-05-02 11:35 [PATCH 0/9] XSA-292 follow-up Jan Beulich
2019-05-02 12:22 ` [PATCH 9/9] x86: PCID is unused when !PV Jan Beulich
2019-05-02 12:22 ` [Xen-devel] " Jan Beulich
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