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From: Roger Pau Monne <roger.pau@citrix.com>
To: <xen-devel@lists.xenproject.org>
Cc: Andrew Cooper <andrew.cooper3@citrix.com>, Wei Liu <wl@xen.org>,
	Jan Beulich <jbeulich@suse.com>,
	Roger Pau Monne <roger.pau@citrix.com>
Subject: [Xen-devel] [PATCH v3 1/2] x86/smp: move and clean APIC helpers
Date: Fri, 17 Jan 2020 10:52:50 +0100	[thread overview]
Message-ID: <20200117095251.42668-2-roger.pau@citrix.com> (raw)
In-Reply-To: <20200117095251.42668-1-roger.pau@citrix.com>

Move __prepare_ICR{2}, apic_wait_icr_idle and
__default_send_IPI_shortcut to the top of the file, since they will be
used by send_IPI_mask in future changes.

While there, take the opportunity to remove the leading underscores,
drop the inline attribute, drop the default prefix from the shorthand
helper, change the return type of the prepare helpers to unsigned and
do some minor style cleanups.

No functional change intended.

Signed-off-by: Roger Pau Monné <roger.pau@citrix.com>
---
Changes since v2:
 - New in this version.
---
 xen/arch/x86/smp.c | 83 ++++++++++++++++++++++------------------------
 1 file changed, 39 insertions(+), 44 deletions(-)

diff --git a/xen/arch/x86/smp.c b/xen/arch/x86/smp.c
index c8e5913e47..c14f304c09 100644
--- a/xen/arch/x86/smp.c
+++ b/xen/arch/x86/smp.c
@@ -23,6 +23,40 @@
 #include <irq_vectors.h>
 #include <mach_apic.h>
 
+/* Helper functions to prepare APIC register values. */
+static unsigned int prepare_ICR(unsigned int shortcut, int vector)
+{
+    return APIC_DM_FIXED | shortcut | vector;
+}
+
+static unsigned int prepare_ICR2(unsigned int mask)
+{
+    return SET_xAPIC_DEST_FIELD(mask);
+}
+
+void apic_wait_icr_idle(void)
+{
+    if ( x2apic_enabled )
+        return;
+
+    while ( apic_read(APIC_ICR) & APIC_ICR_BUSY )
+        cpu_relax();
+}
+
+/* Helper for sending APIC IPIs using a shorthand. */
+static void send_IPI_shortcut(unsigned int shortcut, int vector,
+                              unsigned int dest)
+{
+    unsigned int cfg;
+
+    /* Wait for idle. */
+    apic_wait_icr_idle();
+    /* Prepare target chip field. */
+    cfg = prepare_ICR(shortcut, vector) | dest;
+    /* Send the IPI. The write to APIC_ICR fires this off. */
+    apic_write(APIC_ICR, cfg);
+}
+
 /*
  * send_IPI_mask(cpumask, vector): sends @vector IPI to CPUs in @cpumask,
  * excluding the local CPU. @cpumask may be empty.
@@ -80,48 +114,9 @@ void send_IPI_self(int vector)
  * The following functions deal with sending IPIs between CPUs.
  */
 
-static inline int __prepare_ICR (unsigned int shortcut, int vector)
-{
-    return APIC_DM_FIXED | shortcut | vector;
-}
-
-static inline int __prepare_ICR2 (unsigned int mask)
-{
-    return SET_xAPIC_DEST_FIELD(mask);
-}
-
-void apic_wait_icr_idle(void)
-{
-    if ( x2apic_enabled )
-        return;
-
-    while ( apic_read( APIC_ICR ) & APIC_ICR_BUSY )
-        cpu_relax();
-}
-
-static void __default_send_IPI_shortcut(unsigned int shortcut, int vector,
-                                    unsigned int dest)
-{
-    unsigned int cfg;
-
-    /*
-     * Wait for idle.
-     */
-    apic_wait_icr_idle();
-
-    /*
-     * prepare target chip field
-     */
-    cfg = __prepare_ICR(shortcut, vector) | dest;
-    /*
-     * Send the IPI. The write to APIC_ICR fires this off.
-     */
-    apic_write(APIC_ICR, cfg);
-}
-
 void send_IPI_self_legacy(uint8_t vector)
 {
-    __default_send_IPI_shortcut(APIC_DEST_SELF, vector, APIC_DEST_PHYSICAL);
+    send_IPI_shortcut(APIC_DEST_SELF, vector, APIC_DEST_PHYSICAL);
 }
 
 void send_IPI_mask_flat(const cpumask_t *cpumask, int vector)
@@ -145,13 +140,13 @@ void send_IPI_mask_flat(const cpumask_t *cpumask, int vector)
     /*
      * prepare target chip field
      */
-    cfg = __prepare_ICR2(mask);
+    cfg = prepare_ICR2(mask);
     apic_write(APIC_ICR2, cfg);
 
     /*
      * program the ICR
      */
-    cfg = __prepare_ICR(0, vector) | APIC_DEST_LOGICAL;
+    cfg = prepare_ICR(0, vector) | APIC_DEST_LOGICAL;
 
     /*
      * Send the IPI. The write to APIC_ICR fires this off.
@@ -181,13 +176,13 @@ void send_IPI_mask_phys(const cpumask_t *mask, int vector)
         /*
          * prepare target chip field
          */
-        cfg = __prepare_ICR2(cpu_physical_id(query_cpu));
+        cfg = prepare_ICR2(cpu_physical_id(query_cpu));
         apic_write(APIC_ICR2, cfg);
 
         /*
          * program the ICR
          */
-        cfg = __prepare_ICR(0, vector) | APIC_DEST_PHYSICAL;
+        cfg = prepare_ICR(0, vector) | APIC_DEST_PHYSICAL;
 
         /*
          * Send the IPI. The write to APIC_ICR fires this off.
-- 
2.25.0


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  reply	other threads:[~2020-01-17  9:53 UTC|newest]

Thread overview: 5+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-01-17  9:52 [Xen-devel] [PATCH v3 0/2] x86/smp: add support for APIC ALLBUT IPI shorthand Roger Pau Monne
2020-01-17  9:52 ` Roger Pau Monne [this message]
2020-01-17 10:39   ` [Xen-devel] [PATCH v3 1/2] x86/smp: move and clean APIC helpers Jan Beulich
2020-01-17  9:52 ` [Xen-devel] [PATCH v3 2/2] x86/smp: use APIC ALLBUT destination shorthand when possible Roger Pau Monne
2020-01-20 15:49   ` Jan Beulich

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