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From: Roger Pau Monne <roger.pau@citrix.com>
To: <xen-devel@lists.xenproject.org>
Cc: Andrew Cooper <andrew.cooper3@citrix.com>,
	Roger Pau Monne <roger.pau@citrix.com>, Wei Liu <wl@xen.org>,
	Jan Beulich <jbeulich@suse.com>,
	paul@xen.org
Subject: [PATCH for-4.14 3/8] x86/hvm: fix ISA IRQ 0 handling when set as lowest priority mode in IO APIC
Date: Fri, 12 Jun 2020 17:56:35 +0200	[thread overview]
Message-ID: <20200612155640.4101-4-roger.pau@citrix.com> (raw)
In-Reply-To: <20200612155640.4101-1-roger.pau@citrix.com>

Lowest priority destination mode does allow the vIO APIC code to
select a vCPU to inject the interrupt to, but the selected vCPU must
be part of the possible destinations configured for such IO APIC pin.

Fix the code in order to only force vCPU 0 if it's part of the
listed destinations.

Signed-off-by: Roger Pau Monné <roger.pau@citrix.com>
---
 xen/arch/x86/hvm/vioapic.c | 13 +++++++------
 1 file changed, 7 insertions(+), 6 deletions(-)

diff --git a/xen/arch/x86/hvm/vioapic.c b/xen/arch/x86/hvm/vioapic.c
index 67472e5934..e1417cc6a7 100644
--- a/xen/arch/x86/hvm/vioapic.c
+++ b/xen/arch/x86/hvm/vioapic.c
@@ -422,12 +422,13 @@ static void vioapic_deliver(struct hvm_vioapic *vioapic, unsigned int pin)
     case dest_LowestPrio:
     {
 #ifdef IRQ0_SPECIAL_ROUTING
-        /* Force round-robin to pick VCPU 0 */
-        if ( (irq == hvm_isa_irq_to_gsi(0)) && pit_channel0_enabled() )
-        {
-            v = d->vcpu ? d->vcpu[0] : NULL;
-            target = v ? vcpu_vlapic(v) : NULL;
-        }
+        struct vlapic *lapic0 = vcpu_vlapic(d->vcpu[0]);
+
+        /* Force to pick vCPU 0 if part of the destination list */
+        if ( (irq == hvm_isa_irq_to_gsi(0)) && pit_channel0_enabled() &&
+             vlapic_match_dest(lapic0, NULL, 0, dest, dest_mode) &&
+             vlapic_enabled(lapic0) )
+            target = lapic0;
         else
 #endif
             target = vlapic_lowest_prio(d, NULL, 0, dest, dest_mode);
-- 
2.26.2



  parent reply	other threads:[~2020-06-12 15:57 UTC|newest]

Thread overview: 33+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-06-12 15:56 [PATCH for-4.14 0/8] x86/vpt: fixes for vpt and enable vPIT for PVH dom0 Roger Pau Monne
2020-06-12 15:56 ` [PATCH for-4.14 1/8] x86/hvm: fix vIO-APIC build without IRQ0_SPECIAL_ROUTING Roger Pau Monne
2020-06-15 10:00   ` Paul Durrant
2020-06-15 11:44     ` Roger Pau Monné
2020-06-12 15:56 ` [PATCH for-4.14 2/8] x86/hvm: don't force vCPU 0 for IRQ 0 when using fixed destination mode Roger Pau Monne
2020-06-18 13:43   ` Jan Beulich
2020-06-18 13:48     ` Roger Pau Monné
2020-06-18 14:08       ` Jan Beulich
2020-06-18 14:18         ` Roger Pau Monné
2020-06-18 14:29           ` Jan Beulich
2020-06-18 14:49             ` Roger Pau Monné
2020-06-18 15:16               ` Jan Beulich
2020-06-12 15:56 ` Roger Pau Monne [this message]
2020-06-18 14:26   ` [PATCH for-4.14 3/8] x86/hvm: fix ISA IRQ 0 handling when set as lowest priority mode in IO APIC Jan Beulich
2020-06-18 14:55     ` Roger Pau Monné
2020-06-18 15:20       ` Jan Beulich
2020-06-12 15:56 ` [PATCH for-4.14 4/8] x86/vpt: only try to resume timers belonging to enabled devices Roger Pau Monne
2020-06-18 14:37   ` Jan Beulich
2020-06-18 14:56     ` Roger Pau Monné
2020-06-12 15:56 ` [PATCH for-4.14 5/8] x86/hvm: only translate ISA interrupts to GSIs in virtual timers Roger Pau Monne
2020-06-18 14:47   ` Jan Beulich
2020-06-18 15:03     ` Roger Pau Monné
2020-06-12 15:56 ` [PATCH for-4.14 6/8] x86/vpt: fix injection to remote vCPU Roger Pau Monne
2020-06-18 15:12   ` Jan Beulich
2020-06-18 17:14     ` Roger Pau Monné
2020-06-19 12:37       ` Jan Beulich
2020-06-12 15:56 ` [PATCH for-4.14 7/8] x86/hvm: add hardware domain support to hvm_isa_irq_to_gsi Roger Pau Monne
2020-06-18 15:37   ` Jan Beulich
2020-06-12 15:56 ` [PATCH for-4.14 8/8] x86/hvm: enable emulated PIT for PVH dom0 Roger Pau Monne
2020-06-15 15:33   ` Andrew Cooper
2020-06-15 15:47     ` Roger Pau Monné
2020-06-18 16:05   ` Jan Beulich
2020-06-29 14:46     ` Roger Pau Monné

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