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[5.71.162.151]) by smtp.gmail.com with ESMTPSA id u23sm4096078wmc.32.2020.11.11.13.52.39 (version=TLS1_2 cipher=ECDHE-ECDSA-AES128-GCM-SHA256 bits=128/128); Wed, 11 Nov 2020 13:52:39 -0800 (PST) From: Ash Wilding X-Google-Original-From: Ash Wilding To: xen-devel@lists.xenproject.org Cc: Ash Wilding , julien@xen.org, bertrand.marquis@arm.com, rahul.singh@arm.com Subject: [RFC PATCH v2 03/15] xen/arm: Add ARM64_HAS_LSE_ATOMICS hwcap Date: Wed, 11 Nov 2020 21:51:51 +0000 Message-Id: <20201111215203.80336-4-ash.j.wilding@gmail.com> X-Mailer: git-send-email 2.24.3 (Apple Git-128) In-Reply-To: <20201111215203.80336-1-ash.j.wilding@gmail.com> References: <20201111215203.80336-1-ash.j.wilding@gmail.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit From: Ash Wilding This patch introduces the ARM64_HAS_LSE_ATOMICS hwcap. While doing this, CONFIG_ARM64_LSE_ATOMICS is added to control whether the hwcap is actually detected and set at runtime. Without this Kconfig being set we will always fallback on LL/SC atomics using Armv8.0 exlusive accesses. Note this patch does not actually add the ALTERNATIVE() switching based on the hwcap being detected and set; that comes later in the series. Signed-off-by: Ash Wilding --- xen/arch/arm/Kconfig | 11 +++++++++++ xen/arch/arm/Makefile | 1 + xen/arch/arm/lse.c | 13 +++++++++++++ xen/include/asm-arm/cpufeature.h | 3 ++- 4 files changed, 27 insertions(+), 1 deletion(-) create mode 100644 xen/arch/arm/lse.c diff --git a/xen/arch/arm/Kconfig b/xen/arch/arm/Kconfig index 2777388265..febc41e492 100644 --- a/xen/arch/arm/Kconfig +++ b/xen/arch/arm/Kconfig @@ -78,6 +78,17 @@ config SBSA_VUART_CONSOLE Allows a guest to use SBSA Generic UART as a console. The SBSA Generic UART implements a subset of ARM PL011 UART. +config ARM64_LSE_ATOMICS + bool "Armv8.1-LSE Atomics" + depends on ARM_64 && HAS_ALTERNATIVE + default y + ---help--- + When set, dynamically patch Xen at runtime to use Armv8.1-LSE + atomics when supported by the system. + + When unset, or when Armv8.1-LSE atomics are not supported by the + system, fallback on LL/SC atomics using Armv8.0 exclusive accesses. + config ARM_SSBD bool "Speculative Store Bypass Disable" if EXPERT depends on HAS_ALTERNATIVE diff --git a/xen/arch/arm/Makefile b/xen/arch/arm/Makefile index 296c5e68bb..cadd0ad253 100644 --- a/xen/arch/arm/Makefile +++ b/xen/arch/arm/Makefile @@ -63,6 +63,7 @@ obj-y += vsmc.o obj-y += vpsci.o obj-y += vuart.o extra-y += $(TARGET_SUBARCH)/head.o +obj-$(CONFIG_ARM64_LSE_ATOMICS) += lse.o #obj-bin-y += ....o diff --git a/xen/arch/arm/lse.c b/xen/arch/arm/lse.c new file mode 100644 index 0000000000..8274dac671 --- /dev/null +++ b/xen/arch/arm/lse.c @@ -0,0 +1,13 @@ + +#include +#include + +static int __init update_lse_caps(void) +{ + if ( cpu_has_lse_atomics ) + cpus_set_cap(ARM64_HAS_LSE_ATOMICS); + + return 0; +} + +__initcall(update_lse_caps); diff --git a/xen/include/asm-arm/cpufeature.h b/xen/include/asm-arm/cpufeature.h index 2366926e82..48c172ee29 100644 --- a/xen/include/asm-arm/cpufeature.h +++ b/xen/include/asm-arm/cpufeature.h @@ -42,8 +42,9 @@ #define ARM_SSBD 7 #define ARM_SMCCC_1_1 8 #define ARM64_WORKAROUND_AT_SPECULATE 9 +#define ARM64_HAS_LSE_ATOMICS 10 -#define ARM_NCAPS 10 +#define ARM_NCAPS 11 #ifndef __ASSEMBLY__ -- 2.24.3 (Apple Git-128)