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From: Thomas Gleixner <tglx@linutronix.de>
To: LKML <linux-kernel@vger.kernel.org>
Cc: x86@kernel.org, David Woodhouse <dwmw2@infradead.org>,
	Andrew Cooper <andrew.cooper3@citrix.com>,
	Brian Gerst <brgerst@gmail.com>,
	Arjan van de Veen <arjan@linux.intel.com>,
	Paolo Bonzini <pbonzini@redhat.com>,
	Paul McKenney <paulmck@kernel.org>,
	Tom Lendacky <thomas.lendacky@amd.com>,
	Sean Christopherson <seanjc@google.com>,
	Oleksandr Natalenko <oleksandr@natalenko.name>,
	Paul Menzel <pmenzel@molgen.mpg.de>,
	"Guilherme G. Piccoli" <gpiccoli@igalia.com>,
	Piotr Gorski <lucjan.lucjanov@gmail.com>,
	Usama Arif <usama.arif@bytedance.com>,
	Juergen Gross <jgross@suse.com>,
	Boris Ostrovsky <boris.ostrovsky@oracle.com>,
	xen-devel@lists.xenproject.org,
	Russell King <linux@armlinux.org.uk>,
	Arnd Bergmann <arnd@arndb.de>,
	linux-arm-kernel@lists.infradead.org,
	Catalin Marinas <catalin.marinas@arm.com>,
	Will Deacon <will@kernel.org>, Guo Ren <guoren@kernel.org>,
	linux-csky@vger.kernel.org,
	Thomas Bogendoerfer <tsbogend@alpha.franken.de>,
	linux-mips@vger.kernel.org,
	"James E.J. Bottomley" <James.Bottomley@HansenPartnership.com>,
	Helge Deller <deller@gmx.de>,
	linux-parisc@vger.kernel.org,
	Paul Walmsley <paul.walmsley@sifive.com>,
	Palmer Dabbelt <palmer@dabbelt.com>,
	linux-riscv@lists.infradead.org,
	Mark Rutland <mark.rutland@arm.com>,
	Sabin Rapan <sabrapan@amazon.com>,
	"Michael Kelley (LINUX)" <mikelley@microsoft.com>,
	David Woodhouse <dwmw@amazon.co.uk>
Subject: [patch v3 08/36] x86/smpboot: Split up native_cpu_up() into separate phases and document them
Date: Mon,  8 May 2023 21:43:39 +0200 (CEST)	[thread overview]
Message-ID: <20230508185217.671595388@linutronix.de> (raw)
In-Reply-To: 20230508181633.089804905@linutronix.de

From: David Woodhouse <dwmw@amazon.co.uk>

There are four logical parts to what native_cpu_up() does on the BSP (or
on the controlling CPU for a later hotplug):

 1) Wake the AP by sending the INIT/SIPI/SIPI sequence.

 2) Wait for the AP to make it as far as wait_for_master_cpu() which
    sets that CPU's bit in cpu_initialized_mask, then sets the bit in
    cpu_callout_mask to let the AP proceed through cpu_init().

 3) Wait for the AP to finish cpu_init() and get as far as the
    smp_callin() call, which sets that CPU's bit in cpu_callin_mask.

 4) Perform the TSC synchronization and wait for the AP to actually
    mark itself online in cpu_online_mask.

In preparation to allow these phases to operate in parallel on multiple
APs, split them out into separate functions and document the interactions
a little more clearly in both the BP and AP code paths.

No functional change intended.

Signed-off-by: David Woodhouse <dwmw@amazon.co.uk>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Tested-by: Michael Kelley <mikelley@microsoft.com>


---
 arch/x86/kernel/smpboot.c |  187 +++++++++++++++++++++++++++++-----------------
 1 file changed, 121 insertions(+), 66 deletions(-)
---

--- a/arch/x86/kernel/smpboot.c
+++ b/arch/x86/kernel/smpboot.c
@@ -193,6 +193,10 @@ static void smp_callin(void)
 
 	wmb();
 
+	/*
+	 * This runs the AP through all the cpuhp states to its target
+	 * state (CPUHP_ONLINE in the case of serial bringup).
+	 */
 	notify_cpu_starting(cpuid);
 
 	/*
@@ -233,14 +237,31 @@ static void notrace start_secondary(void
 	load_cr3(swapper_pg_dir);
 	__flush_tlb_all();
 #endif
+	/*
+	 * Sync point with wait_cpu_initialized(). Before proceeding through
+	 * cpu_init(), the AP will call wait_for_master_cpu() which sets its
+	 * own bit in cpu_initialized_mask and then waits for the BSP to set
+	 * its bit in cpu_callout_mask to release it.
+	 */
 	cpu_init_secondary();
 	rcu_cpu_starting(raw_smp_processor_id());
 	x86_cpuinit.early_percpu_clock_init();
+
+	/*
+	 * Sync point with wait_cpu_callin(). The AP doesn't wait here
+	 * but just sets the bit to let the controlling CPU (BSP) know that
+	 * it's got this far.
+	 */
 	smp_callin();
 
-	/* otherwise gcc will move up smp_processor_id before the cpu_init */
+	/* Otherwise gcc will move up smp_processor_id() before cpu_init() */
 	barrier();
-	/* Check TSC synchronization with the control CPU: */
+
+	/*
+	 * Check TSC synchronization with the control CPU, which will do
+	 * its part of this from wait_cpu_online(), making it an implicit
+	 * synchronization point.
+	 */
 	check_tsc_sync_target();
 
 	/*
@@ -259,6 +280,7 @@ static void notrace start_secondary(void
 	 * half valid vector space.
 	 */
 	lock_vector_lock();
+	/* Sync point with do_wait_cpu_online() */
 	set_cpu_online(smp_processor_id(), true);
 	lapic_online();
 	unlock_vector_lock();
@@ -981,17 +1003,13 @@ int common_cpu_up(unsigned int cpu, stru
 /*
  * NOTE - on most systems this is a PHYSICAL apic ID, but on multiquad
  * (ie clustered apic addressing mode), this is a LOGICAL apic ID.
- * Returns zero if CPU booted OK, else error code from
+ * Returns zero if startup was successfully sent, else error code from
  * ->wakeup_secondary_cpu.
  */
 static int do_boot_cpu(int apicid, int cpu, struct task_struct *idle)
 {
-	/* start_ip had better be page-aligned! */
 	unsigned long start_ip = real_mode_header->trampoline_start;
 
-	unsigned long boot_error = 0;
-	unsigned long timeout;
-
 #ifdef CONFIG_X86_64
 	/* If 64-bit wakeup method exists, use the 64-bit mode trampoline IP */
 	if (apic->wakeup_secondary_cpu_64)
@@ -1048,60 +1066,89 @@ static int do_boot_cpu(int apicid, int c
 	 * - Use an INIT boot APIC message
 	 */
 	if (apic->wakeup_secondary_cpu_64)
-		boot_error = apic->wakeup_secondary_cpu_64(apicid, start_ip);
+		return apic->wakeup_secondary_cpu_64(apicid, start_ip);
 	else if (apic->wakeup_secondary_cpu)
-		boot_error = apic->wakeup_secondary_cpu(apicid, start_ip);
-	else
-		boot_error = wakeup_secondary_cpu_via_init(apicid, start_ip);
+		return apic->wakeup_secondary_cpu(apicid, start_ip);
 
-	if (!boot_error) {
-		/*
-		 * Wait 10s total for first sign of life from AP
-		 */
-		boot_error = -1;
-		timeout = jiffies + 10*HZ;
-		while (time_before(jiffies, timeout)) {
-			if (cpumask_test_cpu(cpu, cpu_initialized_mask)) {
-				/*
-				 * Tell AP to proceed with initialization
-				 */
-				cpumask_set_cpu(cpu, cpu_callout_mask);
-				boot_error = 0;
-				break;
-			}
-			schedule();
-		}
-	}
+	return wakeup_secondary_cpu_via_init(apicid, start_ip);
+}
 
-	if (!boot_error) {
-		/*
-		 * Wait till AP completes initial initialization
-		 */
-		while (!cpumask_test_cpu(cpu, cpu_callin_mask)) {
-			/*
-			 * Allow other tasks to run while we wait for the
-			 * AP to come online. This also gives a chance
-			 * for the MTRR work(triggered by the AP coming online)
-			 * to be completed in the stop machine context.
-			 */
-			schedule();
-		}
-	}
+static int wait_cpu_cpumask(unsigned int cpu, const struct cpumask *mask)
+{
+	unsigned long timeout;
 
-	if (x86_platform.legacy.warm_reset) {
-		/*
-		 * Cleanup possible dangling ends...
-		 */
-		smpboot_restore_warm_reset_vector();
+	/*
+	 * Wait up to 10s for the CPU to report in.
+	 */
+	timeout = jiffies + 10*HZ;
+	while (time_before(jiffies, timeout)) {
+		if (cpumask_test_cpu(cpu, mask))
+			return 0;
+
+		schedule();
 	}
+	return -1;
+}
 
-	return boot_error;
+/*
+ * Bringup step two: Wait for the target AP to reach cpu_init_secondary()
+ * and thus wait_for_master_cpu(), then set cpu_callout_mask to allow it
+ * to proceed.  The AP will then proceed past setting its 'callin' bit
+ * and end up waiting in check_tsc_sync_target() until we reach
+ * do_wait_cpu_online() to tend to it.
+ */
+static int wait_cpu_initialized(unsigned int cpu)
+{
+	/*
+	 * Wait for first sign of life from AP.
+	 */
+	if (wait_cpu_cpumask(cpu, cpu_initialized_mask))
+		return -1;
+
+	cpumask_set_cpu(cpu, cpu_callout_mask);
+	return 0;
 }
 
-int native_cpu_up(unsigned int cpu, struct task_struct *tidle)
+/*
+ * Bringup step three: Wait for the target AP to reach smp_callin().
+ * The AP is not waiting for us here so we don't need to parallelise
+ * this step. Not entirely clear why we care about this, since we just
+ * proceed directly to TSC synchronization which is the next sync
+ * point with the AP anyway.
+ */
+static void wait_cpu_callin(unsigned int cpu)
+{
+	while (!cpumask_test_cpu(cpu, cpu_callin_mask))
+		schedule();
+}
+
+/*
+ * Bringup step four: Synchronize the TSC and wait for the target AP
+ * to reach set_cpu_online() in start_secondary().
+ */
+static void wait_cpu_online(unsigned int cpu)
 {
-	int apicid = apic->cpu_present_to_apicid(cpu);
 	unsigned long flags;
+
+	/*
+	 * Check TSC synchronization with the AP (keep irqs disabled
+	 * while doing so):
+	 */
+	local_irq_save(flags);
+	check_tsc_sync_source(cpu);
+	local_irq_restore(flags);
+
+	/*
+	 * Wait for the AP to mark itself online, so the core caller
+	 * can drop sparse_irq_lock.
+	 */
+	while (!cpu_online(cpu))
+		schedule();
+}
+
+static int native_kick_ap(unsigned int cpu, struct task_struct *tidle)
+{
+	int apicid = apic->cpu_present_to_apicid(cpu);
 	int err;
 
 	lockdep_assert_irqs_enabled();
@@ -1142,25 +1189,33 @@ int native_cpu_up(unsigned int cpu, stru
 		return err;
 
 	err = do_boot_cpu(apicid, cpu, tidle);
-	if (err) {
+	if (err)
 		pr_err("do_boot_cpu failed(%d) to wakeup CPU#%u\n", err, cpu);
-		return err;
-	}
 
-	/*
-	 * Check TSC synchronization with the AP (keep irqs disabled
-	 * while doing so):
-	 */
-	local_irq_save(flags);
-	check_tsc_sync_source(cpu);
-	local_irq_restore(flags);
+	return err;
+}
 
-	while (!cpu_online(cpu)) {
-		cpu_relax();
-		touch_nmi_watchdog();
-	}
+int native_cpu_up(unsigned int cpu, struct task_struct *tidle)
+{
+	int ret;
 
-	return 0;
+	ret = native_kick_ap(cpu, tidle);
+	if (ret)
+		goto out;
+
+	ret = wait_cpu_initialized(cpu);
+	if (ret)
+		goto out;
+
+	wait_cpu_callin(cpu);
+	wait_cpu_online(cpu);
+
+out:
+	/* Cleanup possible dangling ends... */
+	if (x86_platform.legacy.warm_reset)
+		smpboot_restore_warm_reset_vector();
+
+	return ret;
 }
 
 /**




  parent reply	other threads:[~2023-05-08 19:43 UTC|newest]

Thread overview: 89+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-05-08 19:43 [patch v3 00/36] cpu/hotplug, x86: Reworked parallel CPU bringup Thomas Gleixner
2023-05-08 19:43 ` [patch v3 01/36] [patch V2 01/38] x86/smpboot: Cleanup topology_phys_to_logical_pkg()/die() Thomas Gleixner
2023-05-08 19:43 ` [patch v3 02/36] cpu/hotplug: Mark arch_disable_smp_support() and bringup_nonboot_cpus() __init Thomas Gleixner
2023-05-08 19:43 ` [patch v3 03/36] x86/smpboot: Avoid pointless delay calibration if TSC is synchronized Thomas Gleixner
2023-05-08 19:43 ` [patch v3 04/36] x86/smpboot: Rename start_cpu0() to soft_restart_cpu() Thomas Gleixner
2023-05-08 19:43 ` [patch v3 05/36] x86/topology: Remove CPU0 hotplug option Thomas Gleixner
2023-05-08 19:43 ` [patch v3 06/36] x86/smpboot: Remove the CPU0 hotplug kludge Thomas Gleixner
2023-05-08 19:43 ` [patch v3 07/36] x86/smpboot: Restrict soft_restart_cpu() to SEV Thomas Gleixner
2023-05-08 19:43 ` Thomas Gleixner [this message]
2023-05-09 10:04   ` [patch v3 08/36] x86/smpboot: Split up native_cpu_up() into separate phases and document them Peter Zijlstra
2023-05-09 12:07     ` Thomas Gleixner
2023-05-09 17:59       ` Thomas Gleixner
2023-05-09 20:11     ` Thomas Gleixner
2023-05-10  8:39       ` Peter Zijlstra
2023-05-09 10:19   ` Peter Zijlstra
2023-05-09 12:08     ` Thomas Gleixner
2023-05-09 18:03     ` Thomas Gleixner
2023-05-09 10:31   ` Peter Zijlstra
2023-05-09 12:09     ` Thomas Gleixner
2023-05-08 19:43 ` [patch v3 09/36] x86/smpboot: Get rid of cpu_init_secondary() Thomas Gleixner
2023-05-08 19:43 ` [patch v3 10/36] [patch V2 10/38] x86/cpu/cacheinfo: Remove cpu_callout_mask dependency Thomas Gleixner
2023-05-08 19:43 ` [patch v3 11/36] [patch V2 11/38] x86/smpboot: Move synchronization masks to SMP boot code Thomas Gleixner
2023-05-08 19:43 ` [patch v3 12/36] [patch V2 12/38] x86/smpboot: Make TSC synchronization function call based Thomas Gleixner
2023-05-08 19:43 ` [patch v3 13/36] x86/smpboot: Remove cpu_callin_mask Thomas Gleixner
2023-05-09 10:49   ` Peter Zijlstra
2023-05-09 12:09     ` Thomas Gleixner
2023-05-08 19:43 ` [patch v3 14/36] [patch V2 14/38] cpu/hotplug: Rework sparse_irq locking in bringup_cpu() Thomas Gleixner
2023-05-09 11:02   ` Peter Zijlstra
2023-05-09 12:10     ` Thomas Gleixner
2023-05-08 19:43 ` [patch v3 15/36] x86/smpboot: Remove wait for cpu_online() Thomas Gleixner
2023-05-08 19:43 ` [patch v3 16/36] x86/xen/smp_pv: Remove wait for CPU online Thomas Gleixner
2023-05-08 19:43 ` [patch v3 17/36] x86/xen/hvm: Get rid of DEAD_FROZEN handling Thomas Gleixner
2023-05-08 19:43 ` [patch v3 18/36] [patch V2 18/38] cpu/hotplug: Add CPU state tracking and synchronization Thomas Gleixner
2023-05-09 11:07   ` Peter Zijlstra
2023-05-09 11:35     ` Peter Zijlstra
2023-05-09 12:12     ` Thomas Gleixner
2023-05-08 19:43 ` [patch v3 19/36] x86/smpboot: Switch to hotplug core state synchronization Thomas Gleixner
2023-05-08 19:43 ` [patch v3 20/36] cpu/hotplug: Remove cpu_report_state() and related unused cruft Thomas Gleixner
2023-05-08 19:44 ` [patch v3 21/36] [patch V2 21/38] ARM: smp: Switch to hotplug core state synchronization Thomas Gleixner
2023-05-08 19:44 ` [patch v3 22/36] arm64: " Thomas Gleixner
2023-05-08 19:44 ` [patch v3 23/36] [patch V2 23/38] csky/smp: " Thomas Gleixner
2023-05-08 19:44 ` [patch v3 24/36] [patch V2 24/38] MIPS: SMP_CPS: " Thomas Gleixner
2023-05-08 19:44 ` [patch v3 25/36] parisc: " Thomas Gleixner
2023-05-08 19:44 ` [patch v3 26/36] riscv: " Thomas Gleixner
2023-05-08 19:44 ` [patch v3 27/36] cpu/hotplug: Remove unused state functions Thomas Gleixner
2023-05-08 19:44 ` [patch v3 28/36] cpu/hotplug: Reset task stack state in _cpu_up() Thomas Gleixner
2023-05-08 19:44 ` [patch v3 29/36] [patch V2 29/38] cpu/hotplug: Provide a split up CPUHP_BRINGUP mechanism Thomas Gleixner
2023-05-08 19:44 ` [patch v3 30/36] x86/smpboot: Enable split CPU startup Thomas Gleixner
2023-05-08 19:44 ` [patch v3 31/36] x86/apic: Provide cpu_primary_thread mask Thomas Gleixner
2023-05-24 20:48   ` Kirill A. Shutemov
2023-05-26 10:14     ` Thomas Gleixner
2023-05-27 13:40       ` Thomas Gleixner
2023-05-29  2:39         ` Kirill A. Shutemov
2023-05-29 19:27           ` Thomas Gleixner
2023-05-29 20:31             ` Kirill A. Shutemov
2023-05-30  0:54               ` Kirill A. Shutemov
2023-05-30  9:26                 ` Thomas Gleixner
2023-05-30 10:34                   ` Thomas Gleixner
2023-05-30 11:37                     ` Kirill A. Shutemov
2023-05-30 12:09                     ` [patch] x86/smpboot: Disable parallel bootup if cc_vendor != NONE Thomas Gleixner
2023-05-30 12:29                       ` Kirill A. Shutemov
2023-05-30 16:00                         ` Thomas Gleixner
2023-05-30 16:56                           ` Sean Christopherson
2023-05-30 19:51                             ` Thomas Gleixner
2023-05-30 20:03                               ` Tom Lendacky
2023-05-30 20:39                                 ` Thomas Gleixner
2023-05-30 21:13                                   ` Tom Lendacky
2023-05-31  7:44                                     ` [patch] x86/smpboot: Fix the parallel bringup decision Thomas Gleixner
2023-05-31 11:07                                       ` Kirill A. Shutemov
2023-05-31 13:58                                       ` Tom Lendacky
2023-05-30 17:02                           ` [patch] x86/smpboot: Disable parallel bootup if cc_vendor != NONE Kirill A. Shutemov
2023-05-30 17:31                             ` Sean Christopherson
2023-05-30  9:26               ` [patch v3 31/36] x86/apic: Provide cpu_primary_thread mask Thomas Gleixner
2023-05-30 10:46               ` [patch] x86/realmode: Make stack lock work in trampoline_compat() Thomas Gleixner
2023-05-30 11:12                 ` Kirill A. Shutemov
2023-06-08 23:34                 ` Yunhong Jiang
2023-06-08 23:57                   ` Andrew Cooper
2023-06-09  0:22                     ` Yunhong Jiang
2023-06-10 19:50                     ` David Laight
2023-06-10 22:51                       ` 'Andrew Cooper'
2023-05-08 19:44 ` [patch v3 32/36] cpu/hotplug: Allow "parallel" bringup up to CPUHP_BP_KICK_AP_STATE Thomas Gleixner
2023-05-08 19:44 ` [patch v3 33/36] x86/apic: Save the APIC virtual base address Thomas Gleixner
2023-05-09  9:20   ` Sergey Shtylyov
2023-05-08 19:44 ` [patch v3 34/36] x86/smpboot: Implement a bit spinlock to protect the realmode stack Thomas Gleixner
2023-05-09 13:13   ` Peter Zijlstra
2023-05-09 13:47     ` Thomas Gleixner
2023-05-08 19:44 ` [patch v3 35/36] x86/smpboot: Support parallel startup of secondary CPUs Thomas Gleixner
2023-05-09 13:57   ` Peter Zijlstra
2023-05-08 19:44 ` [patch v3 36/36] x86/smpboot/64: Implement arch_cpuhp_init_parallel_bringup() and enable it Thomas Gleixner

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