From: Andrew Cooper <andrew.cooper3@citrix.com>
To: Jan Beulich <jbeulich@suse.com>
Cc: "Roger Pau Monné" <roger.pau@citrix.com>, "Wei Liu" <wl@xen.org>,
Xen-devel <xen-devel@lists.xenproject.org>
Subject: Re: [PATCH] x86/cpuid: Advertise no-lmsle unilaterally to hvm guests
Date: Mon, 12 Apr 2021 12:39:24 +0100 [thread overview]
Message-ID: <3e5c2bec-fedd-53af-0a58-d12c8fc13d90@citrix.com> (raw)
In-Reply-To: <fb2a13bc-29aa-d27f-16a5-2ee272a3c122@suse.com>
On 12/04/2021 11:48, Jan Beulich wrote:
> On 12.04.2021 12:22, Andrew Cooper wrote:
>> --- a/xen/arch/x86/cpuid.c
>> +++ b/xen/arch/x86/cpuid.c
>> @@ -456,6 +456,12 @@ static void __init calculate_hvm_max_policy(void)
>> __set_bit(X86_FEATURE_X2APIC, hvm_featureset);
>>
>> /*
>> + * We don't support EFER.LMSLE at all. AMD has dropped the feature from
>> + * hardware and allocated a CPUID bit to indicate its absence.
>> + */
>> + __set_bit(X86_FEATURE_NO_LMSLE, hvm_featureset);
> Why only for HVM?
That was discussed.
> And shouldn't the LM: entry in the dependencies
> table be adjusted such that !LM implies this bit clear?
Probably.
~Andrew
next prev parent reply other threads:[~2021-04-12 11:39 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-04-12 10:22 [PATCH] x86/cpuid: Advertise no-lmsle unilaterally to hvm guests Andrew Cooper
2021-04-12 10:48 ` Jan Beulich
2021-04-12 11:39 ` Andrew Cooper [this message]
2021-04-12 11:52 ` Jan Beulich
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