From: Jan Beulich <jbeulich@suse.com>
To: "Roger Pau Monné" <roger.pau@citrix.com>
Cc: xen-devel@lists.xenproject.org,
Andrew Cooper <andrew.cooper3@citrix.com>,
Ian Jackson <ian.jackson@eu.citrix.com>, Wei Liu <wl@xen.org>,
Jason Andryuk <jandryuk@gmail.com>
Subject: Re: [Xen-devel] [PATCH v2] x86/hvmloader: round up memory BAR size to 4K
Date: Wed, 22 Jan 2020 15:12:03 +0100 [thread overview]
Message-ID: <4345fd83-523e-7209-727e-77d6a36cef01@suse.com> (raw)
In-Reply-To: <20200122105155.GA57924@desktop-tdan49n.eng.citrite.net>
On 22.01.2020 11:51, Roger Pau Monné wrote:
> On Wed, Jan 22, 2020 at 11:27:24AM +0100, Jan Beulich wrote:
>> On 21.01.2020 17:57, Roger Pau Monné wrote:
>>> The PCI spec actually recommends memory BARs to be at least of page
>>> size, but that's not a strict requirement. I would hope there aren't
>>> that many devices with memory BARs smaller than a page.
>>
>> I've simply gone and grep-ed all the stored lspci output I have
>> for some of the test systems I have here:
>>
>> 0/12
>> 3/31 (all 4k-aligned)
>> 6/13 (all 4k-aligned)
>> 3/12
>> 6/19 (all 4k-aligned)
>> 3/7 (all 4k-aligned)
>
> What does X/Y at the beginning of the line stand for?
<number-of-less-than-4k-BARs> / <total-number-of-BARs>
Jan
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prev parent reply other threads:[~2020-01-22 14:12 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-01-17 11:08 [Xen-devel] [PATCH v2] x86/hvmloader: round up memory BAR size to 4K Roger Pau Monne
2020-01-17 16:05 ` Jason Andryuk
2020-01-20 16:10 ` Jan Beulich
2020-01-20 17:18 ` Roger Pau Monné
2020-01-20 20:48 ` Jason Andryuk
2020-01-21 9:18 ` Jan Beulich
2020-01-21 10:29 ` Roger Pau Monné
2020-01-21 10:43 ` Jan Beulich
2020-01-21 15:57 ` Roger Pau Monné
2020-01-21 16:15 ` Jan Beulich
2020-01-21 16:57 ` Roger Pau Monné
2020-01-22 10:27 ` Jan Beulich
2020-01-22 10:51 ` Roger Pau Monné
2020-01-22 14:04 ` Jason Andryuk
2020-01-22 14:15 ` Jan Beulich
2020-01-22 14:12 ` Jan Beulich [this message]
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