From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.3 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI, NICE_REPLY_A,SPF_HELO_NONE,SPF_PASS,USER_AGENT_SANE_1 autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 5B698C433ED for ; Wed, 7 Apr 2021 18:06:57 +0000 (UTC) Received: from lists.xenproject.org (lists.xenproject.org [192.237.175.120]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id E8BA06128A for ; Wed, 7 Apr 2021 18:06:56 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org E8BA06128A Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=xen.org Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=xen-devel-bounces@lists.xenproject.org Received: from list by lists.xenproject.org with outflank-mailman.106884.204339 (Exim 4.92) (envelope-from ) id 1lUCZe-0004sl-Mz; Wed, 07 Apr 2021 18:06:42 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 106884.204339; Wed, 07 Apr 2021 18:06:42 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1lUCZe-0004se-Iy; Wed, 07 Apr 2021 18:06:42 +0000 Received: by outflank-mailman (input) for mailman id 106884; Wed, 07 Apr 2021 18:06:41 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1lUCZd-0004sZ-60 for xen-devel@lists.xenproject.org; Wed, 07 Apr 2021 18:06:41 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1lUCZW-0002qA-Md; Wed, 07 Apr 2021 18:06:34 +0000 Received: from 54-240-197-233.amazon.com ([54.240.197.233] helo=a483e7b01a66.ant.amazon.com) by xenbits.xenproject.org with esmtpsa (TLS1.3:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.92) (envelope-from ) id 1lUCZW-0006Ws-CU; Wed, 07 Apr 2021 18:06:34 +0000 X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Content-Transfer-Encoding:Content-Type:In-Reply-To: MIME-Version:Date:Message-ID:From:References:Cc:To:Subject; bh=dBa7CWhB0OTByIuNtqoL61JE69DlmcrrbF4W9M1CZ6U=; b=HYpy3NR1SvWsTDKf0spz2CUywo E+6MBQYgocNBm81lBGC3qTOdW1hPxaU7Ra6rti6snn6og1RIqwskSf4sgH37q8Gz5IAOU8DQrEmNL p1a2yL61D4lyo2ZeDN+d9H10M5ctG7xlvflcq4iU3xa5Ris+WVpqxL3O3mRu1g3Gm1vU=; Subject: Re: [PATCH 2/2] xen/pci: Gate all MSI code in common code with CONFIG_HAS_PCI_MSI To: Jan Beulich , Rahul Singh Cc: xen-devel@lists.xenproject.org, bertrand.marquis@arm.com, Paul Durrant , Andrew Cooper , George Dunlap , Ian Jackson , Stefano Stabellini , Wei Liu , Daniel De Graaf , =?UTF-8?Q?Roger_Pau_Monn=c3=a9?= References: <4471ba4fffc8a0cef24cc11314fc788334f85ccc.1617702520.git.rahul.singh@arm.com> <75848a0d-d060-6a8b-5ebc-7376ffc14af0@xen.org> From: Julien Grall Message-ID: <4ab1e7ed-cdf6-1b06-4f55-bbb981cade91@xen.org> Date: Wed, 7 Apr 2021 19:06:31 +0100 User-Agent: Mozilla/5.0 (Macintosh; Intel Mac OS X 10.15; rv:78.0) Gecko/20100101 Thunderbird/78.9.0 MIME-Version: 1.0 In-Reply-To: Content-Type: text/plain; charset=utf-8; format=flowed Content-Language: en-GB Content-Transfer-Encoding: 8bit Hi Jan, On 06/04/2021 16:25, Jan Beulich wrote: > On 06.04.2021 16:30, Julien Grall wrote: >> Hi Roger, >> >> On 06/04/2021 15:13, Roger Pau Monné wrote: >>> On Tue, Apr 06, 2021 at 12:39:11PM +0100, Rahul Singh wrote: >>>> MSI support is not implemented for ARM architecture but it is enabled >>>> for x86 architecture and referenced in common passthrough/pci.c code. >>>> >>>> Therefore introducing the new flag to gate the MSI code for ARM in >>>> common code to avoid compilation error when HAS_PCI is enabled for ARM. >>> >>> Is such option really interesting long term? >>> >>> IIRC PCI Express mandates MSI support, at which point I don't see much >>> value in being able to compile out the MSI support. >> >> I am pretty sure there are board out with PCI support but no MSI >> support. Anyway, even if the spec may mandate it... >> >>> >>> So while maybe helpful for Arm PCI efforts ATM, I'm not sure it >>> warrants a Kconfig option, I would rather see Arm introduce dummy >>> helpers for the missing functionality, even if unimplemented at the >>> moment. >> >> ... from my understanding, most of (if not all) the MSI code is not very >> useful on Arm when using the GICv3 ITS. >> >> The GICv3 ITS will do the isolation for you and therefore we should not >> need to keep track of the state at the vPCI level. > > But that's then not "has PCI MSI" but "need to intercept PCI MSI > accesses", i.e. I don't think the Kconfig option is correctly > named. If a device with MSI support is used, you can't make that > MSI support go away, after all. That's actually a good point. Rahul, do you think the config can be renamed to something like CONFIG_PCI_MSI_NEED_INTERCEPT? Cheers, -- Julien Grall