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From: "Jan Beulich" <JBeulich@suse.com>
To: xen-devel <xen-devel@lists.xenproject.org>
Cc: Andrew Cooper <andrew.cooper3@citrix.com>, Keir Fraser <keir@xen.org>
Subject: [PATCH v3 07/10] x86/vMSI-X: support qword MMIO access
Date: Fri, 05 Jun 2015 12:24:18 +0100	[thread overview]
Message-ID: <5571A302020000780008146E@mail.emea.novell.com> (raw)
In-Reply-To: <55719F9D0200007800081425@mail.emea.novell.com>

[-- Attachment #1: Type: text/plain, Size: 3256 bytes --]

The specification explicitly provides for this, so we should have
supported this from the beginning.

Signed-off-by: Jan Beulich <jbeulich@suse.com>

--- a/xen/arch/x86/hvm/vmsi.c
+++ b/xen/arch/x86/hvm/vmsi.c
@@ -209,7 +209,7 @@ static int msixtbl_read(
     unsigned int nr_entry, index;
     int r = X86EMUL_UNHANDLEABLE;
 
-    if ( len != 4 || (address & 3) )
+    if ( (len != 4 && len != 8) || (address & (len - 1)) )
         return r;
 
     rcu_read_lock(&msixtbl_rcu_lock);
@@ -227,15 +227,28 @@ static int msixtbl_read(
              !acc_bit(test, entry, nr_entry, index) )
             goto out;
         *pval = entry->gentries[nr_entry].msi_ad[index];
+        if ( len == 8 )
+        {
+            if ( index )
+                offset = PCI_MSIX_ENTRY_VECTOR_CTRL_OFFSET;
+            else if ( acc_bit(test, entry, nr_entry, 1) )
+                *pval |= (u64)entry->gentries[nr_entry].msi_ad[1] << 32;
+            else
+                goto out;
+        }
     }
-    else 
+    if ( offset == PCI_MSIX_ENTRY_VECTOR_CTRL_OFFSET )
     {
         const struct msi_desc *msi_desc = msixtbl_addr_to_desc(entry, address);
 
         if ( !msi_desc )
             goto out;
-        *pval = MASK_INSR(msi_desc->msi_attrib.guest_masked,
-                          PCI_MSIX_VECTOR_BITMASK);
+        if ( len == 4 )
+            *pval = MASK_INSR(msi_desc->msi_attrib.guest_masked,
+                              PCI_MSIX_VECTOR_BITMASK);
+        else
+            *pval |= (u64)MASK_INSR(msi_desc->msi_attrib.guest_masked,
+                                    PCI_MSIX_VECTOR_BITMASK) << 32;
     }
     
     r = X86EMUL_OKAY;
@@ -255,7 +268,7 @@ static int msixtbl_write(struct vcpu *v,
     unsigned long flags;
     struct irq_desc *desc;
 
-    if ( len != 4 || (address & 3) )
+    if ( (len != 4 && len != 8) || (address & (len - 1)) )
         return r;
 
     rcu_read_lock(&msixtbl_rcu_lock);
@@ -266,16 +279,23 @@ static int msixtbl_write(struct vcpu *v,
     nr_entry = (address - entry->gtable) / PCI_MSIX_ENTRY_SIZE;
 
     offset = address & (PCI_MSIX_ENTRY_SIZE - 1);
-    if ( offset != PCI_MSIX_ENTRY_VECTOR_CTRL_OFFSET)
+    if ( offset != PCI_MSIX_ENTRY_VECTOR_CTRL_OFFSET )
     {
+        index = offset / sizeof(uint32_t);
         if ( nr_entry < MAX_MSIX_ACC_ENTRIES ) 
         {
-            index = offset / sizeof(uint32_t);
             entry->gentries[nr_entry].msi_ad[index] = val;
             acc_bit(set, entry, nr_entry, index);
+            if ( len == 8 && !index )
+            {
+                entry->gentries[nr_entry].msi_ad[1] = val >> 32;
+                acc_bit(set, entry, nr_entry, 1);
+            }
         }
         set_bit(nr_entry, &entry->table_flags);
-        goto out;
+        if ( len != 8 || !index )
+            goto out;
+        val >>= 32;
     }
 
     /* Exit to device model when unmasking and address/data got modified. */
@@ -305,7 +325,8 @@ static int msixtbl_write(struct vcpu *v,
 
 unlock:
     spin_unlock_irqrestore(&desc->lock, flags);
-    r = X86EMUL_OKAY;
+    if ( len == 4 )
+        r = X86EMUL_OKAY;
 
 out:
     rcu_read_unlock(&msixtbl_rcu_lock);




[-- Attachment #2: x86-vMSI-X-rw-qword.patch --]
[-- Type: text/plain, Size: 3291 bytes --]

x86/vMSI-X: support qword MMIO access

The specification explicitly provides for this, so we should have
supported this from the beginning.

Signed-off-by: Jan Beulich <jbeulich@suse.com>

--- a/xen/arch/x86/hvm/vmsi.c
+++ b/xen/arch/x86/hvm/vmsi.c
@@ -209,7 +209,7 @@ static int msixtbl_read(
     unsigned int nr_entry, index;
     int r = X86EMUL_UNHANDLEABLE;
 
-    if ( len != 4 || (address & 3) )
+    if ( (len != 4 && len != 8) || (address & (len - 1)) )
         return r;
 
     rcu_read_lock(&msixtbl_rcu_lock);
@@ -227,15 +227,28 @@ static int msixtbl_read(
              !acc_bit(test, entry, nr_entry, index) )
             goto out;
         *pval = entry->gentries[nr_entry].msi_ad[index];
+        if ( len == 8 )
+        {
+            if ( index )
+                offset = PCI_MSIX_ENTRY_VECTOR_CTRL_OFFSET;
+            else if ( acc_bit(test, entry, nr_entry, 1) )
+                *pval |= (u64)entry->gentries[nr_entry].msi_ad[1] << 32;
+            else
+                goto out;
+        }
     }
-    else 
+    if ( offset == PCI_MSIX_ENTRY_VECTOR_CTRL_OFFSET )
     {
         const struct msi_desc *msi_desc = msixtbl_addr_to_desc(entry, address);
 
         if ( !msi_desc )
             goto out;
-        *pval = MASK_INSR(msi_desc->msi_attrib.guest_masked,
-                          PCI_MSIX_VECTOR_BITMASK);
+        if ( len == 4 )
+            *pval = MASK_INSR(msi_desc->msi_attrib.guest_masked,
+                              PCI_MSIX_VECTOR_BITMASK);
+        else
+            *pval |= (u64)MASK_INSR(msi_desc->msi_attrib.guest_masked,
+                                    PCI_MSIX_VECTOR_BITMASK) << 32;
     }
     
     r = X86EMUL_OKAY;
@@ -255,7 +268,7 @@ static int msixtbl_write(struct vcpu *v,
     unsigned long flags;
     struct irq_desc *desc;
 
-    if ( len != 4 || (address & 3) )
+    if ( (len != 4 && len != 8) || (address & (len - 1)) )
         return r;
 
     rcu_read_lock(&msixtbl_rcu_lock);
@@ -266,16 +279,23 @@ static int msixtbl_write(struct vcpu *v,
     nr_entry = (address - entry->gtable) / PCI_MSIX_ENTRY_SIZE;
 
     offset = address & (PCI_MSIX_ENTRY_SIZE - 1);
-    if ( offset != PCI_MSIX_ENTRY_VECTOR_CTRL_OFFSET)
+    if ( offset != PCI_MSIX_ENTRY_VECTOR_CTRL_OFFSET )
     {
+        index = offset / sizeof(uint32_t);
         if ( nr_entry < MAX_MSIX_ACC_ENTRIES ) 
         {
-            index = offset / sizeof(uint32_t);
             entry->gentries[nr_entry].msi_ad[index] = val;
             acc_bit(set, entry, nr_entry, index);
+            if ( len == 8 && !index )
+            {
+                entry->gentries[nr_entry].msi_ad[1] = val >> 32;
+                acc_bit(set, entry, nr_entry, 1);
+            }
         }
         set_bit(nr_entry, &entry->table_flags);
-        goto out;
+        if ( len != 8 || !index )
+            goto out;
+        val >>= 32;
     }
 
     /* Exit to device model when unmasking and address/data got modified. */
@@ -305,7 +325,8 @@ static int msixtbl_write(struct vcpu *v,
 
 unlock:
     spin_unlock_irqrestore(&desc->lock, flags);
-    r = X86EMUL_OKAY;
+    if ( len == 4 )
+        r = X86EMUL_OKAY;
 
 out:
     rcu_read_unlock(&msixtbl_rcu_lock);

[-- Attachment #3: Type: text/plain, Size: 126 bytes --]

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  parent reply	other threads:[~2015-06-05 11:24 UTC|newest]

Thread overview: 40+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-06-05 11:09 [PATCH v3 00/10] x86/MSI-X: XSA-120, 128..131 follow-up Jan Beulich
2015-06-05 11:20 ` [PATCH v3 01/10] x86/MSI-X: be more careful during teardown Jan Beulich
2015-06-05 11:20 ` [PATCH v3 02/10] x86/MSI-X: access MSI-X table only after having enabled MSI-X Jan Beulich
2015-06-05 13:01   ` Andrew Cooper
2015-06-05 11:21 ` [PATCH v3 03/10] x86/MSI-X: reduce fiddling with control register during restore Jan Beulich
2015-06-05 11:21 ` [PATCH v3 04/10] x86/MSI-X: cleanup Jan Beulich
2015-06-05 11:22 ` [PATCH v3 05/10] x86/MSI: track host and guest masking separately Jan Beulich
2015-06-05 13:05   ` Andrew Cooper
2016-04-01  7:40   ` Li, Liang Z
2016-04-01  8:47     ` Jan Beulich
2016-04-01  9:21       ` Li, Liang Z
2016-04-01  9:33         ` Jan Beulich
2015-06-05 11:23 ` [PATCH v3 06/10] x86/vMSI-X: cleanup Jan Beulich
2015-06-05 13:07   ` Andrew Cooper
2015-06-05 11:24 ` Jan Beulich [this message]
2015-06-05 15:34   ` [PATCH v3 07/10] x86/vMSI-X: support qword MMIO access Andrew Cooper
2015-06-05 11:25 ` [PATCH v3 08/10] x86/MSI-X: use qword MMIO access for address writes Jan Beulich
2015-06-05 15:37   ` Andrew Cooper
2015-06-05 11:26 ` [PATCH v3 09/10] VT-d: use qword MMIO access for MSI " Jan Beulich
2015-06-05 15:39   ` Andrew Cooper
2015-06-05 15:46     ` Jan Beulich
2015-06-11  7:45   ` Tian, Kevin
2015-06-05 11:28 ` [PATCH v3 10/10] x86/MSI-X: provide hypercall interface for mask-all control Jan Beulich
2015-06-05 15:57   ` Andrew Cooper
2015-06-05 16:17     ` Jan Beulich
2015-06-11  8:35   ` Jan Beulich
2015-06-11  9:51     ` Andrew Cooper
2015-06-19 13:00       ` Jan Beulich
2015-06-19 13:05         ` Konrad Rzeszutek Wilk
2015-06-19 14:52           ` Jan Beulich
2015-06-19 14:07         ` Roger Pau Monné
2015-06-19 14:58           ` Jan Beulich
2015-06-22 17:02             ` Roger Pau Monné
2015-06-23  7:20               ` Jan Beulich
2015-06-23  7:29                 ` Roger Pau Monné
2015-06-23  8:13                   ` Jan Beulich
2015-06-22 11:25           ` Jan Beulich
2015-06-12 13:21     ` Konrad Rzeszutek Wilk
2015-06-12 13:51       ` Jan Beulich
2015-06-12 14:17         ` Konrad Rzeszutek Wilk

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