From mboxrd@z Thu Jan  1 00:00:00 1970
From: "Jan Beulich" <JBeulich@suse.com>
Subject: Re: [PATCH v3 10/10] x86/MSI-X: provide hypercall
 interface for mask-all control
Date: Tue, 23 Jun 2015 08:20:23 +0100
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To: =?UTF-8?Q?Roger=20Pau=20Monn=C3=A9?= <roger.pau@citrix.com>
Cc: Wei Liu <wei.liu2@citrix.com>, Stefano Stabellini <stefano.stabellini@eu.citrix.com>, Andrew Cooper <andrew.cooper3@citrix.com>, Ian Jackson <Ian.Jackson@eu.citrix.com>, Ian Campbell <Ian.Campbell@eu.citrix.com>, xen-devel <xen-devel@lists.xenproject.org>, dgdegra@tycho.nsa.gov, Keir Fraser <keir@xen.org>
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>>> On 22.06.15 at 19:02, <roger.pau@citrix.com> wrote:
> OK, I didn't get the part of the question. AFAICT yes, FreeBSD will 
> access the low 256 bytes of the config space. For example the stub to 
> write to a cfg register is as follows:
> 
> void
> pci_cfgregwrite(int bus, int slot, int func, int reg, u_int32_t data, int 
> bytes)
> {
> 
> 	if (cfgmech == CFGMECH_PCIE &&
> 	    (bus >= pcie_minbus && bus <= pcie_maxbus) &&
> 	    (bus != 0 || !(1 << slot & pcie_badslots)))
> 		pciereg_cfgwrite(bus, slot, func, reg, data, bytes);
> 	else
> 		pcireg_cfgwrite(bus, slot, func, reg, data, bytes);
> }
> 
> I take that you would prefer it to be:
> 
> void
> pci_cfgregwrite(int bus, int slot, int func, int reg, u_int32_t data, int 
> bytes)
> {
> 
> 	if (cfgmech == CFGMECH_PCIE &&
> 	    (bus >= pcie_minbus && bus <= pcie_maxbus) &&
> 	    (bus != 0 || !(1 << slot & pcie_badslots)) &&
> 	    (reg > PCI_REGMAX))
> 		pciereg_cfgwrite(bus, slot, func, reg, data, bytes);
> 	else
> 		pcireg_cfgwrite(bus, slot, func, reg, data, bytes);
> }
> 
> Where 'PCI_REGMAX' is 255.

Indeed that would have been nice, but we have to live with what
OSes do. But then again - did I understand correctly that FreeBSD
doesn't support PV Dom0 operation anymore, but wants to only
run in PVH mode? Was that a recent change, i.e. are PV Dom0-s
assumed to still be in use?

Jan