From mboxrd@z Thu Jan 1 00:00:00 1970 From: "Jan Beulich" Subject: Re: [PATCHv2 1/3] x86/fpu: improve check for XSAVE* not writing FIP/FDP fields Date: Wed, 24 Feb 2016 03:49:30 -0700 Message-ID: <56CD98CA02000078000D58D3@prv-mh.provo.novell.com> References: <1456225539-9162-1-git-send-email-david.vrabel@citrix.com> <1456225539-9162-2-git-send-email-david.vrabel@citrix.com> <56CC81CC02000078000D5431@prv-mh.provo.novell.com> <56CC99FB.9010805@citrix.com> <56CD6F1102000078000D5789@prv-mh.provo.novell.com> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: Received: from mail6.bemta14.messagelabs.com ([193.109.254.103]) by lists.xen.org with esmtp (Exim 4.72) (envelope-from ) id 1aYX0g-0000BK-1k for xen-devel@lists.xenproject.org; Wed, 24 Feb 2016 10:49:34 +0000 In-Reply-To: Content-Disposition: inline List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Sender: xen-devel-bounces@lists.xen.org Errors-To: xen-devel-bounces@lists.xen.org To: Kevin Tian Cc: Jun Nakajima , Andrew Cooper , Donald D Dugger , Aravind Gopalakrishnan , David Vrabel , Suravee Suthikulpanit , Sherry Hurwitz , "xen-devel@lists.xenproject.org" List-Id: xen-devel@lists.xenproject.org >>> On 24.02.16 at 11:37, wrote: > Sorry I didn't quite get the question here. Could anyone of you > write down a standalone description of the problem then I can > forward internally to confirm since my translation might be > inaccurate here? What we'd like to get formally stated is whether FIP is guaranteed to be treated as 48-bit pointer, which upon loading/storing by 64-bit {F,}X{XSAVE,RSTOR} will get truncated/canonicalized. With FDP being a full 64-bit pointer on Intel CPUs (but only a 48 bit one on AMD ones), and both your and their manuals implicitly describing both as full 64-bit fields, FIP potentially also being a full 64-bit field on past, present, or future CPUs would render David's intended code improvement unsafe. Jan