From mboxrd@z Thu Jan  1 00:00:00 1970
From: "Jan Beulich" <JBeulich@suse.com>
Subject: Re: [PATCH 1/2] IOMMU/MMU: Adjust top level functions
 for VT-d Device-TLB flush error.
Date: Fri, 18 Mar 2016 03:48:55 -0600
Message-ID: <56EBDD1702000078000DE429@prv-mh.provo.novell.com>
References: <1458197676-60696-1-git-send-email-quan.xu@intel.com>
 <1458197676-60696-2-git-send-email-quan.xu@intel.com>
 <CAFLBxZaTyOE61YX+qe_2qXU=zF32fr-409LK5OSm4QzT+z1EJw@mail.gmail.com>
 <945CA011AD5F084CBEA3E851C0AB28894B86730F@SHSMSX101.ccr.corp.intel.com>
 <56EBC83202000078000DE391@prv-mh.provo.novell.com>
 <945CA011AD5F084CBEA3E851C0AB28894B867412@SHSMSX101.ccr.corp.intel.com>
 <56EBD88E02000078000DE406@prv-mh.provo.novell.com>
 <1458293921.15374.94.camel@citrix.com>
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Cc: KevinTian <kevin.tian@intel.com>, Feng Wu <feng.wu@intel.com>, George Dunlap <George.Dunlap@eu.citrix.com>, Liu Jinsong <jinsong.liu@alibaba-inc.com>, "xen-devel@lists.xen.org" <xen-devel@lists.xen.org>, Jun Nakajima <jun.nakajima@intel.com>, Andrew Cooper <andrew.cooper3@citrix.com>, Keir Fraser <keir@xen.org>
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