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* Question about /proc/interrupts on Xen ARM.
@ 2016-03-24 12:20 신정섭
  2016-03-29 19:09 ` Julien Grall
  0 siblings, 1 reply; 2+ messages in thread
From: 신정섭 @ 2016-03-24 12:20 UTC (permalink / raw)
  To: stefano.stabellini; +Cc: xen-devel


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HI I have a question Question about '/proc/interrupts' on Xen ARM.

I'm running Xen ARM 4.4.2 on Arndale Board.
I Attached a Image that is is result of 'cat /proc/interrupts' DomainU on Xen ARM.

I know that, event channel on Xen ARM only use the IRQ 31.
But xenbus, hvc_console, blk, eth0 use IRQ 32 ~ 38 not IRQ 31.

So I want to know event channel on Xen ARM not only use IRQ 31?


In attached Image

1. When Domain0 want to block data to DomainU, 
Domain0 write block data in blk I/O ring and Inject IRQ 34 instead of IRQ 31?

2. When Domain0 wants to block data to DomainU,
Domain0 write block data in blk I/O ring and Inject IRQ 31. 
After Injection IRQ 31, event channel driver in DomainU checks blk
I/O ring and increases count of IRQ 34 in /proc/interrupt?

Now i'm confusing...

Thanks

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^ permalink raw reply	[flat|nested] 2+ messages in thread

* Re: Question about /proc/interrupts on Xen ARM.
  2016-03-24 12:20 Question about /proc/interrupts on Xen ARM 신정섭
@ 2016-03-29 19:09 ` Julien Grall
  0 siblings, 0 replies; 2+ messages in thread
From: Julien Grall @ 2016-03-29 19:09 UTC (permalink / raw)
  To: 신정섭, stefano.stabellini; +Cc: xen-devel

On 24/03/16 12:20, 신정섭 wrote:
> HI I have a question Question about '/proc/interrupts' on Xen ARM.

Hello,

Please avoid to attach image on the mailing list.

> I'm running Xen ARM 4.4.2 on Arndale Board.
> I Attached a Image that is is result of 'cat /proc/interrupts' DomainU on Xen ARM.
>
> I know that, event channel on Xen ARM only use the IRQ 31.
> But xenbus, hvc_console, blk, eth0 use IRQ 32 ~ 38 not IRQ 31.
>
> So I want to know event channel on Xen ARM not only use IRQ 31?
>
>
> In attached Image
>
> 1. When Domain0 want to block data to DomainU,
> Domain0 write block data in blk I/O ring and Inject IRQ 34 instead of IRQ 31?
>
> 2. When Domain0 wants to block data to DomainU,
> Domain0 write block data in blk I/O ring and Inject IRQ 31.
> After Injection IRQ 31, event channel driver in DomainU checks blk
> I/O ring and increases count of IRQ 34 in /proc/interrupt?
>
> Now i'm confusing...

The first number of each line is the IRQ number. It's a number made by 
Linux and may not match the physical interrupt number.

The IRQ 31 (i.e GIC 31) is the actual PPI used to notify the domain for 
new events.

The IRQs 32-38 are bound to event channels.

I hope this help you.

Regards,

-- 
Julien Grall

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2016-03-29 19:09 ` Julien Grall

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