From mboxrd@z Thu Jan 1 00:00:00 1970 From: "Jan Beulich" Subject: [PATCH] x86: drop hvm/iommu.h Date: Wed, 08 Jun 2016 07:12:18 -0600 Message-ID: <575835D202000078000F310A@prv-mh.provo.novell.com> Mime-Version: 1.0 Content-Type: multipart/mixed; boundary="=__PartDCEADEA2.1__=" Return-path: Received: from mail6.bemta3.messagelabs.com ([195.245.230.39]) by lists.xenproject.org with esmtp (Exim 4.84_2) (envelope-from ) id 1bAdHU-0002Gl-Q8 for xen-devel@lists.xenproject.org; Wed, 08 Jun 2016 13:12:24 +0000 List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xen.org Sender: "Xen-devel" To: xen-devel Cc: Andrew Cooper List-Id: xen-devel@lists.xenproject.org This is a MIME message. If you are reading this text, you may want to consider changing to a mail reader or gateway that understands how to properly handle MIME multipart messages. --=__PartDCEADEA2.1__= Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: quoted-printable Content-Disposition: inline As a follow-up to commit af07377007 ("IOMMU/x86: per-domain control structure is not HVM-specific"), fold hvm/iommu.h into iommu.h. Signed-off-by: Jan Beulich --- a/xen/include/asm-x86/hvm/iommu.h +++ /dev/null @@ -1,66 +0,0 @@ -#ifndef __ASM_X86_HVM_IOMMU_H__ -#define __ASM_X86_HVM_IOMMU_H__ - -#include - -struct iommu_ops; -extern const struct iommu_ops intel_iommu_ops; -extern const struct iommu_ops amd_iommu_ops; -extern int intel_vtd_setup(void); -extern int amd_iov_detect(void); - -static inline const struct iommu_ops *iommu_get_ops(void) -{ - switch ( boot_cpu_data.x86_vendor ) - { - case X86_VENDOR_INTEL: - return &intel_iommu_ops; - case X86_VENDOR_AMD: - return &amd_iommu_ops; - default: - BUG(); - } - - return NULL; -} - -static inline int iommu_hardware_setup(void) -{ - switch ( boot_cpu_data.x86_vendor ) - { - case X86_VENDOR_INTEL: - return intel_vtd_setup(); - case X86_VENDOR_AMD: - return amd_iov_detect(); - default: - return -ENODEV; - } - - return 0; -} - -struct g2m_ioport { - struct list_head list; - unsigned int gport; - unsigned int mport; - unsigned int np; -}; - -#define DEFAULT_DOMAIN_ADDRESS_WIDTH 48 - -struct arch_iommu -{ - u64 pgd_maddr; /* io page directory machine address = */ - spinlock_t mapping_lock; /* io page table lock */ - int agaw; /* adjusted guest address width, 0 is level 2 30-bit */ - struct list_head g2m_ioport_list; /* guest to machine ioport = mapping */ - u64 iommu_bitmap; /* bitmap of iommu(s) that the domain = uses */ - struct list_head mapped_rmrrs; - - /* amd iommu support */ - int paging_mode; - struct page_info *root_table; - struct guest_iommu *g_iommu; -}; - -#endif /* __ASM_X86_HVM_IOMMU_H__ */ --- a/xen/include/asm-x86/iommu.h +++ b/xen/include/asm-x86/iommu.h @@ -14,10 +14,69 @@ #ifndef __ARCH_X86_IOMMU_H__ #define __ARCH_X86_IOMMU_H__ =20 -#include /* For now - should really be merged here. */ +#include +#include +#include +#include =20 +#define DEFAULT_DOMAIN_ADDRESS_WIDTH 48 #define MAX_IOMMUS 32 =20 +struct g2m_ioport { + struct list_head list; + unsigned int gport; + unsigned int mport; + unsigned int np; +}; + +struct arch_iommu +{ + u64 pgd_maddr; /* io page directory machine address = */ + spinlock_t mapping_lock; /* io page table lock */ + int agaw; /* adjusted guest address width, 0 is level 2 30-bit */ + struct list_head g2m_ioport_list; /* guest to machine ioport = mapping */ + u64 iommu_bitmap; /* bitmap of iommu(s) that the domain = uses */ + struct list_head mapped_rmrrs; + + /* amd iommu support */ + int paging_mode; + struct page_info *root_table; + struct guest_iommu *g_iommu; +}; + +extern const struct iommu_ops intel_iommu_ops; +extern const struct iommu_ops amd_iommu_ops; +int intel_vtd_setup(void); +int amd_iov_detect(void); + +static inline const struct iommu_ops *iommu_get_ops(void) +{ + switch ( boot_cpu_data.x86_vendor ) + { + case X86_VENDOR_INTEL: + return &intel_iommu_ops; + case X86_VENDOR_AMD: + return &amd_iommu_ops; + } + + BUG(); + + return NULL; +} + +static inline int iommu_hardware_setup(void) +{ + switch ( boot_cpu_data.x86_vendor ) + { + case X86_VENDOR_INTEL: + return intel_vtd_setup(); + case X86_VENDOR_AMD: + return amd_iov_detect(); + } + + return -ENODEV; +} + /* Does this domain have a P2M table we can use as its IOMMU pagetable? = */ #define iommu_use_hap_pt(d) (hap_enabled(d) && iommu_hap_pt_share) =20 --=__PartDCEADEA2.1__= Content-Type: text/plain; name="x86-fold-hvm-iommu-h.patch" Content-Transfer-Encoding: quoted-printable Content-Disposition: attachment; filename="x86-fold-hvm-iommu-h.patch" x86: drop hvm/iommu.h=0A=0AAs a follow-up to commit af07377007 ("IOMMU/x86:= per-domain control=0Astructure is not HVM-specific"), fold hvm/iommu.h = into iommu.h.=0A=0ASigned-off-by: Jan Beulich =0A=0A--- = a/xen/include/asm-x86/hvm/iommu.h=0A+++ /dev/null=0A@@ -1,66 +0,0 = @@=0A-#ifndef __ASM_X86_HVM_IOMMU_H__=0A-#define __ASM_X86_HVM_IOMMU_H__=0A= -=0A-#include =0A-=0A-struct iommu_ops;=0A-extern const = struct iommu_ops intel_iommu_ops;=0A-extern const struct iommu_ops = amd_iommu_ops;=0A-extern int intel_vtd_setup(void);=0A-extern int = amd_iov_detect(void);=0A-=0A-static inline const struct iommu_ops = *iommu_get_ops(void)=0A-{=0A- switch ( boot_cpu_data.x86_vendor )=0A- = {=0A- case X86_VENDOR_INTEL:=0A- return &intel_iommu_ops;=0A- = case X86_VENDOR_AMD:=0A- return &amd_iommu_ops;=0A- default:=0A-= BUG();=0A- }=0A-=0A- return NULL;=0A-}=0A-=0A-static inline = int iommu_hardware_setup(void)=0A-{=0A- switch ( boot_cpu_data.x86_vendo= r )=0A- {=0A- case X86_VENDOR_INTEL:=0A- return intel_vtd_setu= p();=0A- case X86_VENDOR_AMD:=0A- return amd_iov_detect();=0A- = default:=0A- return -ENODEV;=0A- }=0A-=0A- return 0;=0A-}=0A-= =0A-struct g2m_ioport {=0A- struct list_head list;=0A- unsigned int = gport;=0A- unsigned int mport;=0A- unsigned int np;=0A-};=0A-=0A-#def= ine DEFAULT_DOMAIN_ADDRESS_WIDTH 48=0A-=0A-struct arch_iommu=0A-{=0A- = u64 pgd_maddr; /* io page directory machine address */=0A- = spinlock_t mapping_lock; /* io page table lock */=0A- int = agaw; /* adjusted guest address width, 0 is level 2 30-bit */=0A- = struct list_head g2m_ioport_list; /* guest to machine ioport mapping = */=0A- u64 iommu_bitmap; /* bitmap of iommu(s) that the = domain uses */=0A- struct list_head mapped_rmrrs;=0A-=0A- /* amd = iommu support */=0A- int paging_mode;=0A- struct page_info *root_tabl= e;=0A- struct guest_iommu *g_iommu;=0A-};=0A-=0A-#endif /* __ASM_X86_HVM= _IOMMU_H__ */=0A--- a/xen/include/asm-x86/iommu.h=0A+++ b/xen/include/asm-x= 86/iommu.h=0A@@ -14,10 +14,69 @@=0A #ifndef __ARCH_X86_IOMMU_H__=0A = #define __ARCH_X86_IOMMU_H__=0A =0A-#include /* For now = - should really be merged here. */=0A+#include =0A+#include = =0A+#include =0A+#include =0A = =0A+#define DEFAULT_DOMAIN_ADDRESS_WIDTH 48=0A #define MAX_IOMMUS 32=0A = =0A+struct g2m_ioport {=0A+ struct list_head list;=0A+ unsigned int = gport;=0A+ unsigned int mport;=0A+ unsigned int np;=0A+};=0A+=0A+stru= ct arch_iommu=0A+{=0A+ u64 pgd_maddr; /* io page = directory machine address */=0A+ spinlock_t mapping_lock; /* = io page table lock */=0A+ int agaw; /* adjusted guest address = width, 0 is level 2 30-bit */=0A+ struct list_head g2m_ioport_list; = /* guest to machine ioport mapping */=0A+ u64 iommu_bitmap; = /* bitmap of iommu(s) that the domain uses */=0A+ struct list_head = mapped_rmrrs;=0A+=0A+ /* amd iommu support */=0A+ int paging_mode;=0A= + struct page_info *root_table;=0A+ struct guest_iommu *g_iommu;=0A+}= ;=0A+=0A+extern const struct iommu_ops intel_iommu_ops;=0A+extern const = struct iommu_ops amd_iommu_ops;=0A+int intel_vtd_setup(void);=0A+int = amd_iov_detect(void);=0A+=0A+static inline const struct iommu_ops = *iommu_get_ops(void)=0A+{=0A+ switch ( boot_cpu_data.x86_vendor )=0A+ = {=0A+ case X86_VENDOR_INTEL:=0A+ return &intel_iommu_ops;=0A+ = case X86_VENDOR_AMD:=0A+ return &amd_iommu_ops;=0A+ }=0A+=0A+ = BUG();=0A+=0A+ return NULL;=0A+}=0A+=0A+static inline int iommu_hardwar= e_setup(void)=0A+{=0A+ switch ( boot_cpu_data.x86_vendor )=0A+ {=0A+ = case X86_VENDOR_INTEL:=0A+ return intel_vtd_setup();=0A+ case = X86_VENDOR_AMD:=0A+ return amd_iov_detect();=0A+ }=0A+=0A+ = return -ENODEV;=0A+}=0A+=0A /* Does this domain have a P2M table we can = use as its IOMMU pagetable? */=0A #define iommu_use_hap_pt(d) (hap_enabled(= d) && iommu_hap_pt_share)=0A =0A --=__PartDCEADEA2.1__= Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: base64 Content-Disposition: inline X19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX18KWGVuLWRldmVs IG1haWxpbmcgbGlzdApYZW4tZGV2ZWxAbGlzdHMueGVuLm9yZwpodHRwOi8vbGlzdHMueGVuLm9y Zy94ZW4tZGV2ZWwK --=__PartDCEADEA2.1__=--