From mboxrd@z Thu Jan 1 00:00:00 1970 From: Andrew Cooper Subject: Re: [PATCH 2/2] hvmloader: don't hard-code IO-APIC parameters Date: Fri, 17 Jun 2016 11:05:33 +0100 Message-ID: <59f231ae-60a2-3e0f-cec2-b0b515ff50ce@citrix.com> References: <57628EA302000078000F596B@prv-mh.provo.novell.com> <5762903B02000078000F597E@prv-mh.provo.novell.com> Mime-Version: 1.0 Content-Type: multipart/mixed; boundary="===============1514379953430472388==" Return-path: Received: from mail6.bemta6.messagelabs.com ([85.158.143.247]) by lists.xenproject.org with esmtp (Exim 4.84_2) (envelope-from ) id 1bDqef-0004sv-Up for xen-devel@lists.xenproject.org; Fri, 17 Jun 2016 10:05:38 +0000 In-Reply-To: <5762903B02000078000F597E@prv-mh.provo.novell.com> List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xen.org Sender: "Xen-devel" To: Jan Beulich , xen-devel List-Id: xen-devel@lists.xenproject.org --===============1514379953430472388== Content-Type: multipart/alternative; boundary="------------61B6AEAE07007C1C752FE76D" --------------61B6AEAE07007C1C752FE76D Content-Type: text/plain; charset="windows-1252" Content-Transfer-Encoding: 7bit On 16/06/16 10:40, Jan Beulich wrote: > The IO-APIC address has variable bits determined by the PCI-to-ISA > bridge, and the IO-APIC version should be read from the IO-APIC. (Note > that there's still implicit rather than explicit agreement on the > IO-APIC base address between qemu and the hypervisor.) > > Signed-off-by: Jan Beulich The status quo is not great, and I can see why you want to improve it. However, I think that this is not the way to do that. It ties HVMLoader to the PIIX4 board in Qemu, and will break attempts to use Q35 or something else. (In Q35, the IO-APIC decode address comes from Chipset Configuration Register, rather than ISA device config space). ~Andrew --------------61B6AEAE07007C1C752FE76D Content-Type: text/html; charset="windows-1252" Content-Transfer-Encoding: 8bit

On 16/06/16 10:40, Jan Beulich wrote:

The IO-APIC address has variable bits determined by the PCI-to-ISA
bridge, and the IO-APIC version should be read from the IO-APIC. (Note
that there's still implicit rather than explicit agreement on the
IO-APIC base address between qemu and the hypervisor.)

Signed-off-by: Jan Beulich <jbeulich@suse.com>

The status quo is not great, and I can see why you want to improve it.

However, I think that this is not the way to do that. It ties HVMLoader to the PIIX4 board in Qemu, and will break attempts to use Q35 or something else. (In Q35, the IO-APIC decode address comes from Chipset Configuration Register, rather than ISA device config space).

~Andrew
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