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From: "Jan Beulich" <JBeulich@suse.com>
To: Brian Woods <brian.woods@amd.com>,
	Andrew Cooper <andrew.cooper3@citrix.com>
Cc: xen-devel <xen-devel@lists.xenproject.org>,
	Wei Liu <wei.liu2@citrix.com>,
	Roger Pau Monne <roger.pau@citrix.com>
Subject: Ping: [PATCH v2 2/2] x86/AMD: limit C1E disable family range
Date: Mon, 27 May 2019 03:33:13 -0600	[thread overview]
Message-ID: <5CEBAED90200007800232B97@prv1-mh.provo.novell.com> (raw)
In-Reply-To: <5CA765B80200007800232AA3@prv1-mh.provo.novell.com>

>>> On 05.04.19 at 16:27,  wrote:
> Just like for other family values of 0x17 (see "x86/AMD: correct certain
> Fam17 checks"), commit 3157bb4e13 ("Add MSR support for various feature
> AMD processor families") made the original check for Fam11 here include
> families all the way up to Fam17. The involved MSR (0xC0010055),
> however, is fully reserved starting from Fam16, and the two bits of
> interest are reserved for Fam12 and onwards (albeit I admit I wasn't
> able to find any Fam13 doc). Restore the upper bound to be Fam11.
> 
> Signed-off-by: Jan Beulich <jbeulich@suse.com>
> ---
> v2: New.
> 
> --- a/xen/arch/x86/cpu/amd.c
> +++ b/xen/arch/x86/cpu/amd.c
> @@ -628,7 +628,7 @@ static void init_amd(struct cpuinfo_x86
>  
>  	switch(c->x86)
>  	{
> -	case 0xf ... 0x17:
> +	case 0xf ... 0x11:
>  		disable_c1e(NULL);
>  		if (acpi_smi_cmd && (acpi_enable_value | acpi_disable_value))
>  			amd_acpi_c1e_quirk = true;
> 
> 





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WARNING: multiple messages have this Message-ID (diff)
From: "Jan Beulich" <JBeulich@suse.com>
To: "Brian Woods" <brian.woods@amd.com>,
	"Andrew Cooper" <andrew.cooper3@citrix.com>
Cc: xen-devel <xen-devel@lists.xenproject.org>,
	Wei Liu <wei.liu2@citrix.com>,
	Roger Pau Monne <roger.pau@citrix.com>
Subject: [Xen-devel] Ping: [PATCH v2 2/2] x86/AMD: limit C1E disable family range
Date: Mon, 27 May 2019 03:33:13 -0600	[thread overview]
Message-ID: <5CEBAED90200007800232B97@prv1-mh.provo.novell.com> (raw)
Message-ID: <20190527093313.eYoEgHUbf0nXK_oYkPi3V_J_S0rJtfcncGtqRUVaJ4s@z> (raw)
In-Reply-To: <5CA765B80200007800232AA3@prv1-mh.provo.novell.com>

>>> On 05.04.19 at 16:27,  wrote:
> Just like for other family values of 0x17 (see "x86/AMD: correct certain
> Fam17 checks"), commit 3157bb4e13 ("Add MSR support for various feature
> AMD processor families") made the original check for Fam11 here include
> families all the way up to Fam17. The involved MSR (0xC0010055),
> however, is fully reserved starting from Fam16, and the two bits of
> interest are reserved for Fam12 and onwards (albeit I admit I wasn't
> able to find any Fam13 doc). Restore the upper bound to be Fam11.
> 
> Signed-off-by: Jan Beulich <jbeulich@suse.com>
> ---
> v2: New.
> 
> --- a/xen/arch/x86/cpu/amd.c
> +++ b/xen/arch/x86/cpu/amd.c
> @@ -628,7 +628,7 @@ static void init_amd(struct cpuinfo_x86
>  
>  	switch(c->x86)
>  	{
> -	case 0xf ... 0x17:
> +	case 0xf ... 0x11:
>  		disable_c1e(NULL);
>  		if (acpi_smi_cmd && (acpi_enable_value | acpi_disable_value))
>  			amd_acpi_c1e_quirk = true;
> 
> 





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  parent reply	other threads:[~2019-05-27  9:33 UTC|newest]

Thread overview: 12+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-04-05 13:55 [PATCH v2 0/2] x86/AMD: correct certain Fam17 checks Jan Beulich
2019-04-05 13:55 ` [Xen-devel] " Jan Beulich
2019-04-05 14:26 ` [PATCH v2 1/2] " Jan Beulich
2019-04-05 14:26   ` [Xen-devel] " Jan Beulich
2019-06-17 16:00   ` Andrew Cooper
2019-06-17 16:12     ` Jan Beulich
2019-04-05 14:27 ` [PATCH v2 2/2] x86/AMD: limit C1E disable family range Jan Beulich
2019-04-05 14:27   ` [Xen-devel] " Jan Beulich
     [not found]   ` <5CA765B802000000001041CD@prv1-mh.provo.novell.com>
     [not found]     ` <5CA765B80200007800232AA3@prv1-mh.provo.novell.com>
2019-05-27  9:33       ` Jan Beulich [this message]
2019-05-27  9:33         ` [Xen-devel] Ping: " Jan Beulich
2019-06-17 16:00   ` [Xen-devel] " Andrew Cooper
     [not found] ` <5CA75E4602000000001041BD@prv1-mh.provo.novell.com>
     [not found]   ` <5CA75E460200007800232A93@prv1-mh.provo.novell.com>
2019-06-14 11:44     ` [Xen-devel] Ping#2: [PATCH v2 0/2] x86/AMD: correct certain Fam17 checks Jan Beulich

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