From: Julien Grall <julien@xen.org>
To: Stefano Stabellini <sstabellini@kernel.org>
Cc: xen-devel@lists.xenproject.org, Peng Fan <peng.fan@nxp.com>,
Stefano Stabellini <stefano.stabellini@xilinx.com>,
Wei Xu <xuwei5@hisilicon.com>
Subject: Re: [Xen-devel] [PATCH v2] xen/arm: implement GICD_I[S/C]ACTIVER reads
Date: Mon, 30 Mar 2020 22:19:48 +0100 [thread overview]
Message-ID: <5deb3992-3cf5-2b00-8cef-af75ed83a1fd@xen.org> (raw)
In-Reply-To: <alpine.DEB.2.21.2003300932430.4572@sstabellini-ThinkPad-T480s>
Hi Stefano,
On 30/03/2020 17:35, Stefano Stabellini wrote:
> On Sat, 28 Mar 2020, Julien Grall wrote:
>> qHi Stefano,
>>
>> On 27/03/2020 02:34, Stefano Stabellini wrote:
>>> This is a simple implementation of GICD_ICACTIVER / GICD_ISACTIVER
>>> reads. It doesn't take into account the latest state of interrupts on
>>> other vCPUs. Only the current vCPU is up-to-date. A full solution is
>>> not possible because it would require synchronization among all vCPUs,
>>> which would be very expensive in terms or latency.
>>
>> Your sentence suggests you have number showing that correctly emulating the
>> registers would be too slow. Mind sharing them?
>
> No, I don't have any numbers. Would you prefer a different wording or a
> better explanation? I also realized there is a typo in there (or/of).
Let me start with I think correctness is more important than speed.
So I would have expected your commit message to contain some fact why
synchronization is going to be slow and why this is a problem.
To give you a concrete example, the implementation of set/way
instructions are really slow (it could take a few seconds depending on
the setup). However, this was fine because not implementing them
correctly would have a greater impact on the guest (corruption) and they
are not used often.
I don't think the performance in our case will be in same order
magnitude. It is most likely to be in the range of milliseconds (if not
less) which I think is acceptable for emulation (particularly for the
vGIC) and the current uses.
So lets take a step back and look how we could implement
ISACTIVER/ICACTIVER correctly.
The only thing we need is a snapshot of the interrupts state a given
point. I originally thought it would be necessary to use domain_pause()
which is quite heavy, but I think we only need the vCPU to enter in Xen
and sync the states of the LRs.
Roughly the code would look like (This is not optimized):
for_each_vcpu(d, v)
{
if ( v->is_running )
smp_call_function(do_nothing(), v->cpu);
}
/* Read the state */
A few remarks:
* The function do_nothing() is basically a NOP.
* I am suggesting to use smp_call_function() rather
smp_send_event_check_cpu() is because we need to know when the vCPU has
synchronized the LRs. As the function do_nothing() will be call
afterwards, then we know the the snapshot of the LRs has been done
* It would be possible to everything in one vCPU.
* We can possibly optimize it for the SGIs/PPIs case
This is still not perfect, but I don't think the performance would be
that bad.
Cheers,
--
Julien Grall
next prev parent reply other threads:[~2020-03-30 21:20 UTC|newest]
Thread overview: 41+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-03-27 2:34 [Xen-devel] [PATCH v2] xen/arm: implement GICD_I[S/C]ACTIVER reads Stefano Stabellini
2020-03-28 11:52 ` Julien Grall
2020-03-30 16:35 ` Stefano Stabellini
2020-03-30 21:19 ` Julien Grall [this message]
2020-04-01 0:57 ` Stefano Stabellini
2020-04-01 8:30 ` Julien Grall
2020-04-01 9:54 ` Bertrand Marquis
2020-04-01 17:02 ` George Dunlap
2020-04-01 17:56 ` Julien Grall
2020-04-01 17:23 ` Julien Grall
2020-04-02 8:17 ` Bertrand Marquis
2020-04-02 17:19 ` Stefano Stabellini
2020-04-02 18:52 ` Julien Grall
2020-04-03 8:47 ` Marc Zyngier
2020-04-03 10:43 ` George Dunlap
2020-04-03 10:59 ` Marc Zyngier
2020-04-03 11:15 ` George Dunlap
2020-04-03 11:16 ` Julien Grall
2020-04-03 16:18 ` Stefano Stabellini
2020-04-03 16:23 ` Julien Grall
2020-04-03 17:46 ` Julien Grall
2020-04-03 19:41 ` Stefano Stabellini
2020-04-03 20:27 ` Julien Grall
2020-04-06 17:58 ` George Dunlap
2020-04-06 18:47 ` Julien Grall
2020-04-07 16:16 ` George Dunlap
2020-04-07 16:25 ` Bertrand Marquis
2020-04-07 16:52 ` Julien Grall
2020-04-07 16:50 ` Julien Grall
2020-04-07 16:56 ` Julien Grall
2020-04-07 18:16 ` George Dunlap
2020-04-07 19:58 ` Julien Grall
2020-04-09 1:26 ` Stefano Stabellini
2020-04-09 12:56 ` Julien Grall
2020-04-09 13:00 ` Julien Grall
2020-04-17 15:16 ` Bertrand Marquis
2020-04-17 16:07 ` Julien Grall
2020-04-17 16:31 ` Stefano Stabellini
2020-04-17 16:47 ` Julien Grall
2020-04-08 15:54 ` Julien Grall
2020-03-31 0:05 ` [Xen-devel] " Julien Grall
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=5deb3992-3cf5-2b00-8cef-af75ed83a1fd@xen.org \
--to=julien@xen.org \
--cc=peng.fan@nxp.com \
--cc=sstabellini@kernel.org \
--cc=stefano.stabellini@xilinx.com \
--cc=xen-devel@lists.xenproject.org \
--cc=xuwei5@hisilicon.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).