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Fri, 12 Jun 2020 16:13:17 +0000 From: Bertrand Marquis To: Julien Grall Subject: Re: [PATCH 2/2] xen/arm: Support runstate crossing pages Thread-Topic: [PATCH 2/2] xen/arm: Support runstate crossing pages Thread-Index: AQHWP+e8ujbYpkw47EG7vPpL5OIUa6jU5lsAgABClwA= Date: Fri, 12 Jun 2020 16:13:17 +0000 Message-ID: <6FC8B7BD-8CCF-4CC6-8761-0062BC67DAE7@arm.com> References: <0ea51410-050b-58a6-806a-b175f534852f@xen.org> In-Reply-To: <0ea51410-050b-58a6-806a-b175f534852f@xen.org> Accept-Language: en-GB, en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: Authentication-Results-Original: xen.org; dkim=none (message not signed) header.d=none;xen.org; dmarc=none action=none header.from=arm.com; x-originating-ip: [82.24.250.194] x-ms-publictraffictype: Email X-MS-Office365-Filtering-HT: Tenant X-MS-Office365-Filtering-Correlation-Id: 899ffed3-3180-4f5b-a1c6-08d80eeb88c2 x-ms-traffictypediagnostic: DB7PR08MB3307:|AM0PR08MB3571: X-Microsoft-Antispam-PRVS: x-checkrecipientrouted: true nodisclaimer: true x-ms-oob-tlc-oobclassifiers: OLM:10000;OLM:10000; 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DIR:OUT; SFP:1101; X-MS-Office365-Filtering-Correlation-Id-Prvs: dd5d3ef1-aaad-4553-a4f8-08d80eeb8471 X-Forefront-PRVS: 0432A04947 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: nhExfqhnBuga+NL/QEkCmyRyp4E2dVA2sHEWWTY9DG3Hs8DVUhWAS0mZpM2v6KE2xYQ1OMHpcqRz/Cq6TVd2o4RIny9ucPhD1RP9sJgCSYsDQedk1mmdXB9ADuHn69U1XgnTrfLkR4YhwX3pUOeYyhrdatuvEggFnnxlL1InjOKjfwqIJiXJvgKI3VbS7bmR56NuubwYzFDKUcz7oaCaGzxF8eyFlgrJpg0pMCaegyHByW7ls6h1P4IVQ781uczzy1zqiCptkM07XT9fT0LYmnf62BkshLIH91Wp0InR0F2Uqb5c2upxVenhArdFTsEIOKyVckL1TNvdWzEAleeMbJxrxGq70hV3nZyP9qNNaADTerMFgmnNKH8p7FGbMexN7F1dSTDXeNeqlbWsj283mg== X-OriginatorOrg: arm.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 12 Jun 2020 16:13:24.6905 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 899ffed3-3180-4f5b-a1c6-08d80eeb88c2 X-MS-Exchange-CrossTenant-Id: f34e5979-57d9-4aaa-ad4d-b122a662184d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=f34e5979-57d9-4aaa-ad4d-b122a662184d; Ip=[63.35.35.123]; Helo=[64aa7808-outbound-1.mta.getcheckrecipient.com] X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: AM0PR08MB3571 X-BeenThere: xen-devel@lists.xenproject.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Cc: xen-devel , nd , Volodymyr Babchuk , Stefano Stabellini Errors-To: xen-devel-bounces@lists.xenproject.org Sender: "Xen-devel" Hi, > On 12 Jun 2020, at 13:14, Julien Grall wrote: >=20 > Hi, >=20 > On 11/06/2020 12:58, Bertrand Marquis wrote: >> Add support for runstate area register with the structure crossing pages >=20 > Well, this has always been supported until your previous patch. In genera= l, we try to not break thing in a middle of the series so we can still bise= ct it. >=20 > I think this patch can be simplified a lot by mapping the two page contig= uously (see my previous answer). With that it would be feasible to fold thi= s patch in #1. I will dig into switching to something using vmap. Worst case scenario we would consume 8k * 128 vCPU which is still 1M but sh= ould be acceptable as it could simplify greatly the code. >=20 >> The code is storing up to 2 pages reference during the hypercall. >> During a context switch, the code is computing where the >> state_entry_time is and is breaking the memcpy in 2 parts when it is >> required. >> Signed-off-by: Bertrand Marquis >> --- >> xen/arch/arm/domain.c | 101 +++++++++++++++++++++++++---------- >> xen/include/asm-arm/domain.h | 5 +- >> 2 files changed, 76 insertions(+), 30 deletions(-) >> diff --git a/xen/arch/arm/domain.c b/xen/arch/arm/domain.c >> index 739059234f..d847cb00f2 100644 >> --- a/xen/arch/arm/domain.c >> +++ b/xen/arch/arm/domain.c >> @@ -280,11 +280,16 @@ void arch_cleanup_runstate_guest(struct vcpu *v) >> { >> spin_lock(&v->arch.runstate_guest.lock); >> - /* cleanup previous page if any */ >> - if ( v->arch.runstate_guest.page ) >> + /* cleanup previous pages if any */ >> + if ( v->arch.runstate_guest.page[0] ) >> { >> - put_page_and_type(v->arch.runstate_guest.page); >> - v->arch.runstate_guest.page =3D NULL; >> + put_page_and_type(v->arch.runstate_guest.page[0]); >> + v->arch.runstate_guest.page[0] =3D NULL; >> + if ( v->arch.runstate_guest.page[1] ) >> + { >> + put_page_and_type(v->arch.runstate_guest.page[1]); >> + v->arch.runstate_guest.page[1] =3D NULL; >> + } >=20 > I think this can be moved outside of the first if. Agree >=20 >> v->arch.runstate_guest.offset =3D 0; >> } >> @@ -294,26 +299,25 @@ void arch_cleanup_runstate_guest(struct vcpu *v) >> int arch_setup_runstate_guest(struct vcpu *v, >> struct vcpu_register_runstate_memory_area a= rea) >> { >> - struct page_info *page; >> + struct page_info *page[2] =3D {NULL,NULL}; >=20 > I don't think you need the temporary variable. You can directly update pa= ge[0] as it is protected by the lock. The nice benefits is you could take a= dvantage of a common helper to cleanup and reduce the complexity of the cod= e. Would make sense yes (and remove the unlock everywhere). I will try that, thanks for the hint. >=20 >> unsigned offset; >> spin_lock(&v->arch.runstate_guest.lock); >> - /* cleanup previous page if any */ >> - if ( v->arch.runstate_guest.page ) >> + /* cleanup previous pages if any */ >> + if ( v->arch.runstate_guest.page[0] ) >> { >> - put_page_and_type(v->arch.runstate_guest.page); >> - v->arch.runstate_guest.page =3D NULL; >> + put_page_and_type(v->arch.runstate_guest.page[0]); >> + v->arch.runstate_guest.page[0] =3D NULL; >> + if ( v->arch.runstate_guest.page[1] ) >> + { >> + put_page_and_type(v->arch.runstate_guest.page[1]); >> + v->arch.runstate_guest.page[1] =3D NULL; >> + } >> v->arch.runstate_guest.offset =3D 0; >> } >> offset =3D ((vaddr_t)area.addr.v) & ~PAGE_MASK; >> - if ( offset > (PAGE_SIZE - sizeof(struct vcpu_runstate_info)) ) >> - { >> - spin_unlock(&v->arch.runstate_guest.lock); >> - gprintk(XENLOG_DEBUG, "Runstate is crossing pages\n"); >> - return -EINVAL; >> - } >> /* provided address must be aligned to a 64bit */ >> if ( offset % alignof(struct vcpu_runstate_info) ) >> @@ -323,15 +327,30 @@ int arch_setup_runstate_guest(struct vcpu *v, >> return -EINVAL; >> } >> - page =3D get_page_from_gva(v, (vaddr_t)area.addr.v, GV2M_WRITE); >> - if ( !page ) >> + page[0] =3D get_page_from_gva(v, (vaddr_t)area.addr.v, GV2M_WRITE); >> + if ( !page[0] ) >> { >> spin_unlock(&v->arch.runstate_guest.lock); >> gprintk(XENLOG_DEBUG, "Runstate pointer is not mapped\n"); >> return -EINVAL; >> } >> - v->arch.runstate_guest.page =3D page; >> + if ( offset > (PAGE_SIZE - sizeof(struct vcpu_runstate_info)) ) >> + { >> + /* guest area is crossing pages */ >> + page[1] =3D get_page_from_gva(v, (vaddr_t)area.addr.v + PAGE_SI= ZE, >> + GV2M_WRITE); >> + if ( !page[1] ) >> + { >> + put_page_and_type(v->arch.runstate_guest.page[0]); > v->arch.runstate_guest.page[0] would be NULL as you set it afterwards. So= you want to set v->arch.runstate_guest.page[0] beforehand. Nice catch, should have been page[0] alone. Thanks Bertrand