From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.8 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 1050EC63798 for ; Wed, 25 Nov 2020 18:17:10 +0000 (UTC) Received: from lists.xenproject.org (lists.xenproject.org [192.237.175.120]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 527242075A for ; Wed, 25 Nov 2020 18:17:09 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 527242075A Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=arm.com Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=xen-devel-bounces@lists.xenproject.org Received: from list by lists.xenproject.org with outflank-mailman.37955.70576 (Exim 4.92) (envelope-from ) id 1khzLg-0001a6-Fc; Wed, 25 Nov 2020 18:17:00 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 37955.70576; Wed, 25 Nov 2020 18:17:00 +0000 X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1khzLg-0001Zv-BZ; Wed, 25 Nov 2020 18:17:00 +0000 Received: by outflank-mailman (input) for mailman id 37955; Wed, 25 Nov 2020 18:16:58 +0000 Received: from us1-rack-iad1.inumbo.com ([172.99.69.81]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1khzLe-0001Oz-9f for xen-devel@lists.xenproject.org; Wed, 25 Nov 2020 18:16:58 +0000 Received: from foss.arm.com (unknown [217.140.110.172]) by us1-rack-iad1.inumbo.com (Halon) with ESMTP id 8db06e9a-3041-4f8a-a772-db9e0c6eee0a; Wed, 25 Nov 2020 18:16:50 +0000 (UTC) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id BDFEB11D4; Wed, 25 Nov 2020 10:16:50 -0800 (PST) Received: from scm-wfh-server-rahsin01.stack04.eu02.mi.arm.com (unknown [10.58.246.76]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 715AE3F23F; Wed, 25 Nov 2020 10:16:49 -0800 (PST) Received: from us1-rack-iad1.inumbo.com ([172.99.69.81]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1khzLe-0001Oz-9f for xen-devel@lists.xenproject.org; Wed, 25 Nov 2020 18:16:58 +0000 X-Inumbo-ID: 8db06e9a-3041-4f8a-a772-db9e0c6eee0a Received: from foss.arm.com (unknown [217.140.110.172]) by us1-rack-iad1.inumbo.com (Halon) with ESMTP id 8db06e9a-3041-4f8a-a772-db9e0c6eee0a; Wed, 25 Nov 2020 18:16:50 +0000 (UTC) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id BDFEB11D4; Wed, 25 Nov 2020 10:16:50 -0800 (PST) Received: from scm-wfh-server-rahsin01.stack04.eu02.mi.arm.com (unknown [10.58.246.76]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 715AE3F23F; Wed, 25 Nov 2020 10:16:49 -0800 (PST) From: Rahul Singh To: xen-devel@lists.xenproject.org Cc: bertrand.marquis@arm.com, rahul.singh@arm.com, Andrew Cooper , George Dunlap , Ian Jackson , Jan Beulich , Julien Grall , Stefano Stabellini , Wei Liu Subject: [PATCH v4 3/3] ns16550: Gate all PCI code with CONFIG_X86 Date: Wed, 25 Nov 2020 18:16:04 +0000 Message-Id: <6d64bb35a6ce247faaa3df2ebae27b6bfa1d969e.1606326929.git.rahul.singh@arm.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: References: In-Reply-To: References: MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The NS16550 driver is assuming that NS16550 PCI card are usable if the architecture supports PCI (i.e. CONFIG_HAS_PCI=y). However, the code is very x86 focus and will fail to build on Arm (/!\ it is not all the errors): ns16550.c: In function ‘ns16550_init_irq’: ns16550.c:726:21: error: implicit declaration of function ‘create_irq’; did you mean ‘release_irq’? [-Werror=implicit-function-declaration] uart->irq = create_irq(0, false); ^~~~~~~~~~ release_irq ns16550.c:726:21: error: nested extern declaration of ‘create_irq’ [-Werror=nested-externs] ns16550.c: In function ‘ns16550_init_postirq’: ns16550.c:768:33: error: ‘mmio_ro_ranges’ undeclared (first use in this function); did you mean ‘mmio_handler’? rangeset_add_range(mmio_ro_ranges, uart->io_base, ^~~~~~~~~~~~~~ mmio_handler ns16550.c:768:33: note: each undeclared identifier is reported only once for each function it appears in ns16550.c:780:20: error: variable ‘msi’ has initializer but incomplete type struct msi_info msi = { ^~~~~~~~ Enabling support for NS16550 PCI card on Arm would require more plumbing in addition to fixing the compilation error. Arm systems tend to have platform UART available such as NS16550, PL011. So there are limited reasons to get NS16550 PCI support for now on Arm. Guard all remaining PCI code that is not under x86 flag with CONFIG_X86. No functional change intended. Signed-off-by: Rahul Singh --- Changes in v4: - As per the discussion guard all remaining PCI code with CONFIG_X86 --- xen/drivers/char/ns16550.c | 16 ++++++++-------- 1 file changed, 8 insertions(+), 8 deletions(-) diff --git a/xen/drivers/char/ns16550.c b/xen/drivers/char/ns16550.c index 9235d854fe..26e601857a 100644 --- a/xen/drivers/char/ns16550.c +++ b/xen/drivers/char/ns16550.c @@ -16,7 +16,7 @@ #include #include #include -#ifdef CONFIG_HAS_PCI +#if defined(CONFIG_X86) && defined(CONFIG_HAS_PCI) #include #include #include @@ -51,7 +51,7 @@ static struct ns16550 { unsigned int timeout_ms; bool_t intr_works; bool_t dw_usr_bsy; -#ifdef CONFIG_HAS_PCI +#if defined(CONFIG_X86) && defined(CONFIG_HAS_PCI) /* PCI card parameters. */ bool_t pb_bdf_enable; /* if =1, pb-bdf effective, port behind bridge */ bool_t ps_bdf_enable; /* if =1, ps_bdf effective, port on pci card */ @@ -66,7 +66,7 @@ static struct ns16550 { #endif } ns16550_com[2] = { { 0 } }; -#ifdef CONFIG_HAS_PCI +#if defined(CONFIG_X86) && defined(CONFIG_HAS_PCI) struct ns16550_config { u16 vendor_id; u16 dev_id; @@ -256,7 +256,7 @@ static int ns16550_getc(struct serial_port *port, char *pc) static void pci_serial_early_init(struct ns16550 *uart) { -#ifdef CONFIG_HAS_PCI +#if defined(CONFIG_X86) && defined(CONFIG_HAS_PCI) if ( !uart->ps_bdf_enable || uart->io_base >= 0x10000 ) return; @@ -355,7 +355,7 @@ static void __init ns16550_init_preirq(struct serial_port *port) static void __init ns16550_init_irq(struct serial_port *port) { -#ifdef CONFIG_HAS_PCI +#if defined(CONFIG_X86) && defined(CONFIG_HAS_PCI) struct ns16550 *uart = port->uart; if ( uart->msi ) @@ -397,7 +397,7 @@ static void __init ns16550_init_postirq(struct serial_port *port) uart->timeout_ms = max_t( unsigned int, 1, (bits * uart->fifo_size * 1000) / uart->baud); -#ifdef CONFIG_HAS_PCI +#if defined(CONFIG_X86) && defined(CONFIG_HAS_PCI) if ( uart->bar || uart->ps_bdf_enable ) { if ( uart->param && uart->param->mmio && @@ -477,7 +477,7 @@ static void ns16550_suspend(struct serial_port *port) stop_timer(&uart->timer); -#ifdef CONFIG_HAS_PCI +#if defined(CONFIG_X86) && defined(CONFIG_HAS_PCI) if ( uart->bar ) uart->cr = pci_conf_read16(PCI_SBDF(0, uart->ps_bdf[0], uart->ps_bdf[1], uart->ps_bdf[2]), PCI_COMMAND); @@ -486,7 +486,7 @@ static void ns16550_suspend(struct serial_port *port) static void _ns16550_resume(struct serial_port *port) { -#ifdef CONFIG_HAS_PCI +#if defined(CONFIG_X86) && defined(CONFIG_HAS_PCI) struct ns16550 *uart = port->uart; if ( uart->bar ) -- 2.17.1