From: Jan Beulich <jbeulich@suse.com>
To: Julien Grall <julien@xen.org>
Cc: "Durrant, Paul" <pdurrant@amazon.co.uk>,
Stefano Stabellini <sstabellini@kernel.org>,
"andrew.cooper3@citrix.com" <andrew.cooper3@citrix.com>,
George Dunlap <george.dunlap@citrix.com>,
"Xia, Hongyan" <hongyxia@amazon.com>,
"xen-devel@lists.xenproject.org" <xen-devel@lists.xenproject.org>
Subject: Re: Memory ordering question in the shutdown deferral code
Date: Mon, 21 Sep 2020 15:32:27 +0200 [thread overview]
Message-ID: <80e221e0-a1d5-4cc1-b083-1e8f537f016c@suse.com> (raw)
In-Reply-To: <ad81f6ac-6127-bea8-a503-d16d3dc175df@xen.org>
On 21.09.2020 15:27, Julien Grall wrote:
> I think this part is racy at least on non-x86 platform as x86 seems to
> implement smp_mb() with a strong memory barrier (mfence).
The "strength" of the memory barrier doesn't matter here imo. It's
the fully coherent memory model (for WB type memory) which makes
this be fine on x86. The barrier still only guarantees ordering,
not visibility.
Jan
next prev parent reply other threads:[~2020-09-21 13:32 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
[not found] <468576ba-8d3f-98e9-e65e-1128b5220d40@xen.org>
2020-09-21 11:40 ` Memory ordering question in the shutdown deferral code Julien Grall
2020-09-21 12:55 ` Durrant, Paul
2020-09-21 13:25 ` Xia, Hongyan
2020-09-21 13:27 ` Julien Grall
2020-09-21 13:32 ` Jan Beulich [this message]
2020-09-21 13:35 ` Durrant, Paul
2020-09-21 14:02 ` Jan Beulich
2020-09-23 22:57 ` Stefano Stabellini
2020-09-24 11:10 ` Julien Grall
2020-09-21 13:11 ` Jan Beulich
2020-09-21 14:22 ` Julien Grall
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