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mx.microsoft.com 1; spf=pass smtp.mailfrom=epam.com; dmarc=pass action=none header.from=epam.com; dkim=pass header.d=epam.com; arc=none DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=epam.com; s=selector1; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=7FbDhL/syt/rYJ2rMzkj3W5HWlVabCifNiS1DWUfHLI=; b=y/I+Inf0zx2jNaojRNQPlWu5pFd8E++2JFwHWjHD7dOoLFcx2Fkb1TfzK6J/dbueoPumKypxiieTbKddazNqDw+vhk5n2D63JAlUPW6Hw1cpeeYd9WrdgdET4PhkJCsQQBmL1VpWhUpGCMJK9DYRF3QlovE/dtofMAcaMnRm4kCK6mQXh18fTlqMB0MJq3C4poqmnDUno8dVhBnDSazSrE/JxzNqiPelou7IscevkHEtL8JMpEVG9ibT+OaeZxLna9CZ75/DG92W720gevnLzpoQBfHgZoaK99srT/sC1+EWo1DCMFDPal+F4pDdjSTxdmKYws9BXLdSDAooDs+a4Q== From: Volodymyr Babchuk To: Bertrand Marquis CC: "xen-devel@lists.xenproject.org" , Stefano Stabellini , Julien Grall Subject: Re: [PATCH v2 3/7] xen/arm: create a cpuinfo structure for guest Thread-Topic: [PATCH v2 3/7] xen/arm: create a cpuinfo structure for guest Thread-Index: AQHWxyRRyTw/iUdji0eQScYdbZeE1KnhHOoA Date: Mon, 30 Nov 2020 20:15:53 +0000 Message-ID: <87tut67g93.fsf@epam.com> References: <539cc9c817a80e35a2532dba5bc01e9b2533ff56.1606742184.git.bertrand.marquis@arm.com> In-Reply-To: <539cc9c817a80e35a2532dba5bc01e9b2533ff56.1606742184.git.bertrand.marquis@arm.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: user-agent: mu4e 1.4.10; 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charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-OriginatorOrg: epam.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-AuthSource: VI1PR03MB6400.eurprd03.prod.outlook.com X-MS-Exchange-CrossTenant-Network-Message-Id: 479a6e53-9f9b-4354-0275-08d8956cbd1a X-MS-Exchange-CrossTenant-originalarrivaltime: 30 Nov 2020 20:15:53.3793 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: b41b72d0-4e9f-4c26-8a69-f949f367c91d X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: hqNL1xyYnMFDt8o8Pyh/1sbLlrkjQqzTAd7WesV6+IBL5x/C8Op2gKzd0pDYszQelKaY3TqbhiTQJbspZFPH+S7u4P8TUaMr0yKzsHuOP+w= X-MS-Exchange-Transport-CrossTenantHeadersStamped: VI1PR03MB3136 X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:6.0.312,18.0.737 definitions=2020-11-30_08:2020-11-30,2020-11-30 signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 suspectscore=0 clxscore=1015 impostorscore=0 lowpriorityscore=0 phishscore=0 mlxscore=0 adultscore=0 priorityscore=1501 malwarescore=0 bulkscore=0 spamscore=0 mlxlogscore=999 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2009150000 definitions=main-2011300129 Bertrand Marquis writes: > Create a cpuinfo structure for guest and mask into it the features that > we do not support in Xen or that we do not want to publish to guests. > > Modify some values in the cpuinfo structure for guests to mask some > features which we do not want to allow to guests (like AMU) or we do not > support (like SVE). > > The code is trying to group together registers modifications for the > same feature to be able in the long term to easily enable/disable a > feature depending on user parameters or add other registers modification > in the same place (like enabling/disabling HCR bits). > > Signed-off-by: Bertrand Marquis > --- > Changes in V2: rebase > --- > xen/arch/arm/cpufeature.c | 51 ++++++++++++++++++++++++++++++++ > xen/include/asm-arm/cpufeature.h | 2 ++ > 2 files changed, 53 insertions(+) > > diff --git a/xen/arch/arm/cpufeature.c b/xen/arch/arm/cpufeature.c > index 204be9b084..309941ff37 100644 > --- a/xen/arch/arm/cpufeature.c > +++ b/xen/arch/arm/cpufeature.c > @@ -24,6 +24,8 @@ > =20 > DECLARE_BITMAP(cpu_hwcaps, ARM_NCAPS); > =20 > +struct cpuinfo_arm __read_mostly guest_cpuinfo; > + > void update_cpu_capabilities(const struct arm_cpu_capabilities *caps, > const char *info) > { > @@ -156,6 +158,55 @@ void identify_cpu(struct cpuinfo_arm *c) > #endif > } > =20 > +/* > + * This function is creating a cpuinfo structure with values modified to= mask > + * all cpu features that should not be published to guest. > + * The created structure is then used to provide ID registers values to = guests. > + */ > +static int __init create_guest_cpuinfo(void) > +{ > + /* > + * TODO: The code is currently using only the features detected on t= he boot > + * core. In the long term we should try to compute values containing= only > + * features supported by all cores. > + */ > + identify_cpu(&guest_cpuinfo); > + > +#ifdef CONFIG_ARM_64 > + /* Disable MPAM as xen does not support it */ > + guest_cpuinfo.pfr64.mpam =3D 0; > + guest_cpuinfo.pfr64.mpam_frac =3D 0; > + > + /* Disable SVE as Xen does not support it */ > + guest_cpuinfo.pfr64.sve =3D 0; > + guest_cpuinfo.zfr64.bits[0] =3D 0; > + > + /* Disable MTE as Xen does not support it */ > + guest_cpuinfo.pfr64.mte =3D 0; > +#endif > + > + /* Disable AMU */ > +#ifdef CONFIG_ARM_64 > + guest_cpuinfo.pfr64.amu =3D 0; > +#endif > + guest_cpuinfo.pfr32.amu =3D 0; > + > + /* Disable RAS as Xen does not support it */ > +#ifdef CONFIG_ARM_64 > + guest_cpuinfo.pfr64.ras =3D 0; > + guest_cpuinfo.pfr64.ras_frac =3D 0; > +#endif > + guest_cpuinfo.pfr32.ras =3D 0; > + guest_cpuinfo.pfr32.ras_frac =3D 0; > + > + return 0; > +} > +/* > + * This function needs to be run after all smp are started to have > + * cpuinfo structures for all cores. > + */ This comment contradicts with TODO at the beginning of create_guest_cpuinfo(). > +__initcall(create_guest_cpuinfo); > + > /* > * Local variables: > * mode: C > diff --git a/xen/include/asm-arm/cpufeature.h b/xen/include/asm-arm/cpufe= ature.h > index 64354c3f19..0ab6dd42a0 100644 > --- a/xen/include/asm-arm/cpufeature.h > +++ b/xen/include/asm-arm/cpufeature.h > @@ -290,6 +290,8 @@ extern void identify_cpu(struct cpuinfo_arm *); > extern struct cpuinfo_arm cpu_data[]; > #define current_cpu_data cpu_data[smp_processor_id()] > =20 > +extern struct cpuinfo_arm guest_cpuinfo; > + > #endif /* __ASSEMBLY__ */ > =20 > #endif --=20 Volodymyr Babchuk at EPAM=